MB15A01 Fujitsu Microelectronics, MB15A01 Datasheet - Page 7

• Manufacturer Part Number: MB15A01
• Description: Bi-cmos 1.1 GHZ PLL Frequency Synthesizer
• Manufacturer: Fujitsu Microelectronics

MB15A01
1. Pulse Swallow Function
2. Serial Data Input Method
For the pulse swallow function, use the following equations to select their respective setting values:
Serial data is processed using three input pins (Data, Clock, and LE pins) to control the 15-bit reference divider
and the 18-bit programmable divider separately.
Input binary-coded serial data to the Data pin.
Serial data is input to the internal shift register in sequence at the rise of each clock pulse. When the load enable
signal input pin has a high level (or open), the input data is transferred to the latch depending on the control bit.
(1) Divide Ratio of Reference Divider
The reference divider consists of a 16-bit shift register, a 15-bit latch, and a 14-bit reference counter. Serial data
is made up of the following 16 bits:
FUNCTIONAL DESCRIPTIONS
f
f
P
N
A
f
R
Control bit = “H”: Transfer to the 15-bit latch
Control bit = “L”: Transfer to the 18-bit latch
VCO
VCO
OSC
= ((P
• 14-bit programmable reference divide ratio
Note: The divide ratio must not be less than 6.
SW: Prescaler division bit
S1 to S14: Divide ratio setting bits (Divide ratio of 6 to 16383)
C: Control bit (Set it to “H”.)
Note: Start data input with MSB first.
Divide ratio
N) + A)
C
: Output frequency of externally connected VCO
: Prescaler divide ratio (64 or 128)
: Divide ratio of 11-bit programmable counter (16 to 2047)
: Divide ratio of 7-bit swallow counter (0 to 127, A < N)
: Reference oscillation frequency
: Divide ratio of 14-bit programmable reference counter (6 to 16383)
R
6
7
•
S
1
SW = “H”: 64/65 division
SW = “L”: 128/129 division
Divide ratio setting bits for programmable reference counter
Control bit
LSB
S
14
2
S
0
0
•
f
OSC
S
13
3
S
0
0
•
R
S
4
12
S
0
0
•
S
11
5
S
0
0
•
S
10
6
S
0
0
•
S
7
S
9
0
0
•
Prescaler divide ratio setting bit
S
8
S
8
0
0
•
S
9
S
7
0
0
•
10
S
S
6
0
0
•
11
S
S
5
0
0
•
(Set value: 6 to 16383)
12
S
S
4
0
0
•
MSB
13
S
S
3
1
1
•
14
S
S
2
1
1
•
W
S
S
1
0
1
•
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