CMX867D2 CML Microcircuits, CMX867D2 Datasheet - Page 28

• Manufacturer Part Number: CMX867D2
• Description: Low power V.22 modem
• Manufacturer: CML Microcircuits

Low Power V.22 Modem
Notes: ** This column shows the corresponding IRQ Mask bits in the General Control Register. A 0 to 1
2001 Consumer Microcircuits Limited
General Reset command or by setting b7 or b8 of the General Control Register to 1.
When the descrambler is enabled then detection of continuous unscrambled 1s will inhibit the
The operation of the data demodulator and pattern detector circuits within the CMX867 does not
depend on the state of the Rx energy detect function.
Decoding of Status Register b8,7 in Rx Modem Modes, see also Figure 7a
transition on any of the Status Register bits 14-5 will cause the IRQ bit b15 to be set to 1 if the
corresponding IRQ Mask bit is 1. The IRQ bit is cleared by a read of the Status Register or a
continuous scrambled 1s detector.
The IRQN output pin will be pulled low (to V
IRQNEN bit (b6) of the General Control Register are both 1.
Changes to Status Register bits caused by a change of Tx or Rx operating mode can take up to
150 s to take effect.
In Powersave mode or when the Reset bit (b7) of the General Control Register is 1 the Ring
Detect bit (b14) continues to operate but all other bits will be 0.
The ‘continuous 0’ and ‘continuous 1’ detectors monitor the Rx signal after the DPSK
descrambler, (see Figure 7a) and hence will detect continuous 1s or 0s if the descrambler is
disabled, or continuous scrambled 1s or 0s if the descrambler is enabled.
b8
1
1
0
0
b7
1
0
1
0
Continuous unscrambled 0s
Continuous unscrambled 1s
Descrambler disabled
Figure 9a Operation of Status Register bits 5-10
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Continuous unscrambled 1s
SS
Continuous scrambled 1s
Continuous scrambled 0s
) when the IRQ bit of the Status Register and the
Descrambler enabled
(DPSK modes only)
(see note)
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CMX867
D/867/2