CDS-1401 Datel, Inc., CDS-1401 Datasheet

CDS-1401

Manufacturer Part Number

CDS-1401

Description

Fast-settling Correlated Double Sampling Circuit: 14-bit

Manufacturer

Datel, Inc.

Datasheet

1.CDS-1401.pdf (8 pages)

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DATEL, Inc., 11 Cabot Boulevard, Mansfield, MA 02048-1151 (U.S.A.)

FEATURES

GENERAL DESCRIPTION

The CDS-1401 is an application-specific, correlated double

sampling (CDS) circuit designed for electronic-imaging

applications that employ CCD’s (charge coupled devices) as

their photodetector. The CDS-1401 has been optimized for

use in digital video applications that employ 10 to 14-bit A/D

converters. The low-noise CDS-1401 can accurately

determine each pixel’s true video signal level by sequentially

sampling the pixel’s offset signal and its video signal and

subtracting the two. The result is that the consequences of

residual charge, charge injection and low-frequency “kTC”

noise on the CCD’s output floating capacitor are effectively

eliminated. The CDS-1401 can also be used as a dual

sample-hold amplifier in a data acquisition system.

The CDS-1401 contains two sample-hold amplifiers and

appropriate support/control circuitry. Features include

independent offset-adjust capability for each S/H, adjustment

for matching gain between the two S/H’s, and four control

Use with 10 to 14-bit A/D converters

1.25 Megapixels/second minimum throughput (14 bits)

±10V input/output ranges, Gain = –1

Low noise, 200µVrms

Two independent S/H amplifiers

Gain matching between S/H's

Offset adjustments for each S/H

Four external A/D control lines

Small package, 24-pin ceramic DDIP

Low power, 700mW

Low cost

INNOVATION and EX C ELL E N C E

OFFSET ADJUST V1 1

OFFSET ADJUST V2 9

OFFSET ADJUST I1 2

OFFSET ADJUST I2 10

ANALOG INPUT 1

ANALOG INPUT 2

S/H1 COMMAND 11

S/H2 COMMAND 12

ANALOG GROUND

5, 14, 21, 23

100k

Figure 1. CDS-1401 Functional Block Diagram

+15V SUPPLY

Tel: (508) 339-3000 Fax: (508) 339-6356

–

S/H 1

900

S/H 2

Correlated Double Sampling Circuit

= 100pF

–15V SUPPLY

= 100pF

lines for triggering the A/D converter used in conjunction with

the CDS-1401. The CDS circuit’s “ping-pong” timing

approach (the offset signal of the “n+1” pixel can be acquired

while the video output of the “nth” pixel is being converted)

guarantees a minimum throughput, in a 14-bit application, of

1.25MHz. In other words, the true video signal (minus offset)

will be available

OFFSET ADJUST V1

OFFSET ADJUST I1

ANALOG INPUT 1

ANALOG INPUT 2

ANALOG GROUND

S/H1 OUT

S/H1 ROUT

S/H2 SUMMING NODE

OFFSET ADJUST V2

OFFSET ADJUST I2

S/H1 COMMAND

S/H2 COMMAND

FUNCTION

+5V DIGITAL

SUPPLY

INPUT/OUTPUT CONNECTIONS

100

GROUND

DIGITAL

14-Bit, Fast-Settling

For immediate assistance (800) 233-2765

18 A/D CLOCK 1

19 A/D CLOCK 2

20 A/D CLOCK 2

22 V OUT

17 A/D CLOCK 1

S/H1 ROUT

S/H2

SUMMING NODE

S/H1 OUT

OPTIONAL

CDS-1401

FUNCTION

V OUT

+15V ANALOG SUPPLY

ANALOG GROUND

A/D CLOCK2

A/D CLOCK1

+5V DIGITAL SUPPLY

DIGITAL GROUND

ANALOG GROUND

–15V ANALOG SUPPLY

(continued on page 4-5)

Related parts for CDS-1401

CDS-1401 Summary of contents

Page 1

... The result is that the consequences of residual charge, charge injection and low-frequency “kTC” noise on the CCD’s output floating capacitor are effectively eliminated. The CDS-1401 can also be used as a dual sample-hold amplifier in a data acquisition system. The CDS-1401 contains two sample-hold amplifiers and appropriate support/control circuitry ...

Page 2

... Logic Loading "0" — Pins 3 and 4. See Figure 4 for relationship between input voltage, accuracy, and acquisition time. PHYSICAL/ENVIRONMENTAL UNITS PARAMETERS Volts Operating Temp. Range, Case Volts CDS-1401MC Volts CDS-1401MM +0.3 Volts Thermal Impedance Volts jc °C ca Storage Temperature Range Package Type Weight +25° +70° ...

Page 3

... S/H amplifier (10V step setting to ±0.003%). The input and output of the CDS-1401 can swing up to ±10 Volts. The functionally complete CDS-1401 is packaged in a single, 24-pin, ceramic DDIP. It operates from ±15V and +5V supplies and consumes 700mW. Though the CDS-1401’ ...

Page 4

... The DATEL CDS-1401 takes a slightly different, though clearly superior, approach to CDS. It can be called the “sample- subtract-sample” approach. Note that the CDS-1401 has been configured to offer the greatest amount of user flexibility. Its two S/H circuits function independently. They have separate input and output pins. ...

Page 5

... S/H2 into its hold mode, and after a brief transient settling time, the valid video signal appears at pin 22 (V OUT). Timing Notes See Figure 2, Typical Timing Diagram advisable that neither of the CDS-1401's S/H amplifiers be in their sample/ RESET OFFSET (N+1) (CCD OUTPUT) ANALOG INPUT ...

Page 6

... A/D CLOCK2 (pin 19 delayed version of the signal applied to pin 12 (S/H2 COMMAND), and A/D CLOCK2 (pin 20) is its complement. Any one of these signals, as appropriate, may be used to trigger the A/D conversion. Figure typical timing diagram for a CDS-1401 in front of DATEL's 12-bit, 1.2MHz sampling A/D, the ADS-CCD1201. 6 ® ...

Page 7

... A/D CLOCK 2 6 S/H1 OUT A/D CLOCK 1 7 S/H1 ROUT A/D CLOCK 1 8 S/H2 SUMMING NODE +5V DIGITAL SUPPLY 9 OFFSET ADJUST V2 DIGITAL GROUND 10 ANALOG GROUND OFFSET ADJUST I2 11 S/H1 COMMAND 12 –15V ANALOG SUPPLY S/H2 COMMAND Figure 5. CDS-1401 Typical Connection Diagram 7 CDS-1401 24 +15V + 0.1µF 2.2µ +5V + 0.1µF 2.2µF 15 ...

Page 8

... Kovar alloy 50 microinches (minimum) gold plating 0.060 TYP. 0.015 (1.524) (0.381) MAX. radius 0.130 TYP. for any pin (3.302) 0.010 TYP. (0.254) Heat Sink for CDS-1401 DDIP models ® DS-0315 10/96 ...

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