S1D15714 Epson Company, S1D15714 Datasheet - Page 56

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S1D15714

Manufacturer Part Number
S1D15714
Description
a single chip MLS driver
Manufacturer
Epson Company
Datasheet
10. TIMING CHARACTERISTICS
(1) System path read/write characteristics 1 (80 system MPU)
Table 10.1
*1. This is in case of making the access by WR and RD, setting the CS = LOW.
*2. This is in case of making the access by CS, setting the WR, RD = LOW.
*3. Input signal rise and fall time (tr, tf) must not exceed 15 ns. When the system cycle time is used at a high speed,
*4. Timing is entirely specified with reference to 20% or 80% of V
*5.
Rev. 1.0
Address hold time
Address setup time
System write cycle time
System read cycle time
Control LOW-pulse width (Write)
Control LOW-pulse width (Read)
Control HIGH-pulse width (Write)
Control HIGH-pulse width (Read)
Data setup time
Data hold time
RD access time
Output disable time
it is specified by (
t
LOW level.
CCLW
*1
*2
and
D0 to D7
D0 to D7
WR, RD
WR, RD
(Write)
(Read)
Parameter
t
CS
CS
A0
CCLR
are specified in terms of the overlapped period when CS is at LOW level and WR and RD are at
t
r +
t
f
)
(
t
CYC8
t
AW8
t
CCLW
D0 to D7
Signal
WR
WR
WR
RD
RD
RD
A0
t
t
f
CCHW
t
EPSON
Fig. 10.1
ACC8
t
CCLR
Symbol
t
t
) or (
t
t
t
WCYC8
t
t
RCYC8
CCHW
t
CCLW
CCHR
t
t
t
CCLR
t
ACC8
AW8
DH8
OH8
AH8
DS8
,
t
CCLW
t
t
r +
DS8
t
f)
DD
Condition
C
.
(
L
t
[V
=100pF
CYC8
DD
t
t
t
CYC8
t
OH8
r
AH8
= 2.7V to 5.5V, Ta = –40 to +85 C]
t
t
t
CCLR
CCHR
DH8
,
t
Specified value
CCHW
7000
3000
Min.
t
500
200
200
200
200
CCHR
30
0
0
5
S1D15714 Series
).
Max.
3500
200
Unit
ns
53

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