MCP6569 Microchip Technology, MCP6569 Datasheet - Page 17

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MCP6569

Manufacturer Part Number
MCP6569
Description
(MCP6566 - MCP6569) 1.8V Low Power Open-Drain Output Comparator
Manufacturer
Microchip Technology
Datasheet

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4.0
The MCP6566/6R/6U/7/9 family of open-drain output
comparators are fabricated on Microchip’s state-of-
the-art CMOS process. They are suitable for a wide
range of high speed applications requiring low power
consumption.
4.1
4.1.1
The input stage of this family of devices uses two
differential input stages in parallel. This configuration
provides three regions of operation, one operates at
low input voltages, one at high input voltages, and one
at mid input voltage. With this topology, the input
voltage range is 0.3V above V
while providing low offset voltage through out the
common mode range. The input offset voltage is
measured at both V
proper operation.
The MCP6566/6R/6U/7/9 family has internally-set
hysteresis
offset accuracy and large enough to eliminate output
chattering caused by the comparator’s own input noise
voltage
offset voltage (V
(input-referred) low-high and high-low trip points. Input
hysteresis voltage (V
the same trip points.
FIGURE 4-1:
comparators’ internal hysteresis eliminates
output chatter caused by input noise voltage.
© 2009 Microchip Technology Inc.
-1
-2
-3
8
7
6
5
4
3
2
1
0
E
V
APPLICATIONS INFORMATION
Comparator Inputs
NI
DD
V
.
NORMAL OPERATION
HYST
= 5.0V
V
Figure 4-1
OUT
that is small enough to maintain input
OS
SS
) is the center (average) of the
Time (100 ms/div)
HYST
- 0.3V and V
The MCP6566/6R/6U/7/9
depicts this behavior. Input
) is the difference between
Hysteresis
DD
V
IN
and 0.3V below V
DD
+ 0.3V to ensure
25
20
15
10
5
0
-5
-10
-15
-20
-25
-30
SS
,
4.1.2
The ESD protection on the inputs can be depicted as
shown in
protect the input transistors, and to minimize input bias
current (I
when they try to go more than one diode drop below
V
above V
allow normal operation, and low enough to bypass ESD
events within the specified limits.
FIGURE 4-2:
Structures.
In order to prevent damage and/or improper operation
of these amplifiers, the circuits they are in must limit the
currents (and voltages) at the V
Section 1.1 “Maximum Ratings*” at the beginning of
Section 1.0 “Electrical Characteristics”).
shows the recommended approach to protecting these
inputs. The internal ESD diodes prevent the input pins
(V
the resistors R
out of the input pin. Diodes D
pin (V
When implemented as shown, resistors R
limit the current through D
FIGURE 4-3:
Inputs.
SS
IN
MCP6566/6R/6U/7/9
V
V
. They also clamp any voltages that go too far
+ and V
V
V
1
2
V
IN
IN
DD
SS
+
R
R
+ and V
DD
B
1
2
). The input ESD diodes clamp the inputs
Figure
; their breakdown voltage is high enough to
Bond
Bond
Bond
R
R
INPUT VOLTAGE AND CURRENT
LIMITS
Pad
Pad
Pad
IN
1
2
D
V
V
–) from going too far below ground, and
1
1
SS
SS
and R
D
IN
4-2. This structure was chosen to
– (minimum expected V
– (minimum expected V
2
–) from going too far above V
2
Simplified Analog Input ESD
Protecting the Analog
limit the possible current drawn
Stage
Input
MCP656X
2 mA
2 mA
1
+
and D
R
1
V
3
and D
DD
IN
+ and V
2
.
2
DS22143B-page 17
V
Bond
prevent the input
Pad
PU
R
1
IN
1
2
)
and R
4
)
– pins (see
Figure 4-3
V
V
IN
OUT
2
also
DD
.

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