ACS411CS Semtech Corporation, ACS411CS Datasheet - Page 12

• Manufacturer Part Number: ACS411CS
• Description: Acapella Optical Modem ic
• Manufacturer: Semtech Corporation

ACS411CS PRE-RELEASE Issue 6.0 July 1999.
The ACS4110 incorporates an 8-bit parallel
microprocessor bus interface, which can be configured
for the following modes via the bus interface mode
control pins UPSEL(3:1) as defined in Table 9.
Note: Bit 0 is the least significant bit for all modes used
here, and the byte structure complies to little endian
format (byte 0 is least significant and stored at lowest
address).
In OFF Mode, the bus interface is disabled. Control of
the device is solely via I/O pins. This will result in limited
programmability, as for example individual set-ups for
remote loop-back and local loop-back for each channel
are not possible, only a collective one. In this mode, all
BUS I/O pins are tri-stated or used as additional input
pins (ie. POL(3:1), CKLOCAL).
The EPROM mode (UPSEL = 1) enables the device to
read its set-up from a memory device. An internal state
machine controls the access to the memory. All
addresses in the memory map are read, and the device
is set up according to the corresponding data. The
access time is scaled to interface with the AMD
AM27C020 at lowest speed (250ns) specification.
The valid read addresse 0, 0xAA is used to check if a
memory device is actually attached to the device. If no
memory is attached, the bus interface reverts to the
default OFF mode. All other read addresses are not
valid. The bus interface pins used in EPROM mode are
defined in Table 10.
Microprocessor Interface
Bus Interface Mode Selection
EPROM mode
UPSEL(3:1) Mode
111 (7)
110 (6)
101 (5)
100 (4)
011 (3)
010 (2)
001 (1)
000 (0)
Pin
CSB
A(4:0)
AD(7:0)
Table 10: uP Bus Interface Pins for EPROM mode.
Table 9: Microprocessor Interface Mode Selection
O
OFF
OFF
SERIAL
MOTOROLA
INTEL
MULTIPLEXED Multiplexed bus interface
EPROM
OFF
Dir
O
I
Active low chip select/output enable
Address output to EPROM
Data input from EPROM
Description
Description
Interface disabled
Interface disabled
Serial uP bus interface
Motorola interface
Intel compatible bus interface
Interface disabled
EPROM read mode
12
The MULTIPLEXED mode (UPSEL = 2) enables the
ACS4110 to interface with a microprocessor using a
combined multiplexed address/data bus. The bus
interface pins are defined in Table 11.
The INTEL mode (UPSEL = 3) enables the ACS4110
to interface with a Intel 80x86 type microprocessor
bus. The bus interface pins used are defined in Table
12.
The MOTOROLA mode (UPSEL = 4) enables the
ACS4110 to interface with a Motorola 680x0 type
microprocessor bus. The bus interface pins used are
defined in Table 13.
MULTIPLEXED mode
INTEL mode
MOTOROLA mode
Table 11: uP Bus Interface Pins for MULTIPLEXED mode.
Pin
CSB
ALE
RDB
WRB
AD(7:0)
RDY
Pin
CSB
RDB
WRB
A(4:0)
AD(7:0)
RDY
Pin
CSB
WRB
A(4:0)
AD(7:0)
RDY
Table 13: uP Bus Interface Pins for MOTOROLA mode.
Table 12: uP Bus Interface Pins for INTEL mode.
Dir
I
I
I
IO
O
Dir
I
I
I
I
IO
O
Dir
I
I
I
I
IO
O
Active low chip select
Address latch enable
Active low read enable
Active low write enable
Address / Data bus
Ready
Active low chip select
Active low read enable
Active low write enable
Address bus
Data bus
Ready
Active low chip select
Read / write bar select
Address bus
Data bus
Active low data transfer
acknowledge (DTACK)
Description
Description
Description