ADP3310 Analog Devices, ADP3310 Datasheet - Page 6

• Manufacturer Part Number: ADP3310
• Description: Precision Voltage Regulator Controller
• Manufacturer: Analog Devices

ADP3310
APPLICATION INFORMATION
The ADP3310 is very easy to use. A P-channel power MOSFET
and a small capacitor on the output is all that is needed to form
an inexpensive ultralow dropout regulator. The advantage of
using the ADP3310 controller is that it can drive a pass PMOS
FET to provide a regulated output at high current.
FET Selection
The type and size of the pass transistor are determined by the
threshold voltage, input-output voltage differential and load
current. The selected PMOS must satisfy the physical and
thermal design requirements. Table I shows a partial list of
manufacturers providing the PMOS devices. To ensure that the
maximum V
at worst case conditions (i.e., temperature and manufacturing
tolerances), the maximum available V
Maximum V
(1) V
Equation (1) applies to a gate-to-source voltage less than the
gate to source clamp voltage.
(2) V
If V
If V
The difference between V
voltage drop due to the load current and the ON resistance of
the FET. As a safety margin, it is recommended to use a MOS-
FET with a V
value from Equation 1. Also, in the event the circuit is shorted
to ground, the MOSFET must be able to conduct the maximum
short circuit current. The selected MOSFET must satisfy these
criteria; otherwise, a different pass device should be used. If the
FET data is not available in the catalogue, contact the FET
manufacturer.
Thermal Design
The maximum allowable thermal resistance between the FET
junction and the highest ambient temperature must be taken
into account to determine the type of FET package used. One
square inch of PCB copper area as heatsink yields a typical
the SO-8 package. For substantially lower thermal resistances,
D
For normal applications, the FET can be directly mounted to the
PCB. But, for higher power applications, an external heat sink is
required to satisfy the
Calculating thermal resistance for V
I
T
T
O
JA
J
AMBMAX
2
= 3 A:
PAK or TO-220 type of packages are recommended.
~ 60 C/W for the SOT-223 package and
IN
IN
I
R
V
For Example: V
V
V
OMAX
> 5 V, either logic level or standard MOSFET can be used.
GS
S
BE
GS
DS
DS
= Current Sense Resistor
5 V, logic level FET should be considered.
= V
~ 0.7 V (Room Temp)
~ 0.5 V (Hot)
~ 0.9 V (Cold)
= 5 V – 0.7 V – 3 A 11 m = 4.27 V
= V
= 5 V – 3.3 V = 1.7 V
= Junction Temperature
= Maximum Ambient Temperature
= Maximum Output Current
GS
GS
IN
IN
GS
provided by the controller will turn on the FET
– V
– V
is calculated as follows:
at least 1.5 times lower than the calculated V
BE
O
IN
JA
JA
– I
= 5 V, V
requirement and provide adequate heatsink.
OMAX
(V
IS
T
and V
DSMAX
J
– T
O
R
S
= 3.3 V and I
OUT
AMBMAX
IN
I
GS
(V
= 5 V, V
OMAX
must be determined.
DS
) must exceed the
)
JA
O
OMAX
~ 50 C/W for
= 3.3 V, and
= 3 A,
GS
–6–
anyCAP is a trademark of Analog Devices, Inc.
V
I
For such a low
NDP6020P in a heatsink mountable TO-220 package, is
required. The required external heatsink is determined as
follows:
For a safety margin, select a heatsink with a
the value calculated above to allow extended duration of short
circuit. In a natural convection environment, a large heatsink
such as 3" length of Type 63020 extrusion from Aavid Engineering
is required.
External Capacitors
The ADP3310 is stable with virtually any good quality capaci-
tors (anyCAP™), independent of the capacitor’s minimum ESR
(Effective Series Resistance) value. The actual value of the ca-
pacitor and its associated ESR depends on the g
pacitance of the external PMOS device. A 10 F capacitor at the
output is sufficient to ensure stability for up to 10 A output
current. Larger capacitors can be used if high output current
surges are anticipated. Extremely low ESR capacitors (ESR 0)
such as multilayer ceramic or OSCON are preferred because
they offer lower ripple on the output. For less demanding
requirements, a standard tantalum or even an aluminum
electrolytic is adequate. However, if an aluminum electrolytic is
used, be sure it meets the temperature requirements because
aluminum electrolytic has poor performance over temperature.
Shutdown Mode
Applying a TTL high signal to the EN pin or tying it to the
input pin will enable the output. Pulling this pin low or tying it
to ground will disable the output. In shutdown mode, the
controller’s quiescent current is reduced to less than 1 A.
Gate-to-Source Clamp
An 8 V gate-to-source voltage clamp is provided to protect the
MOSFET in the event the output is suddenly shorted to
ground. This allows the use of the new, low on-state resistance
(R
Short Circuit Protection
The power FET is protected during short circuit conditions
with a foldback type of current limiting which significantly re-
duces the current.
Current Sense Resistor
Current limit is achieved by setting an appropriate current sense
resistor (R
limit sense resistor R
OMAX
CA
CA
JA
JC
JC
CA
JA
DSMAX
DSON
=
= Case-to-Ambient Thermal Resistance
= Junction-to-Ambient Thermal Resistance
= Junction-to-Case Thermal Resistance
= 2 C/W for NDP6020P
= 14.7 C/W – 2 C/W = 12.7 C/W
) FETs.
JA
= Maximum Drain to Source Voltage
= Maximum Output Current
=
S
–
) across the current limit threshold voltage. Current
125 50
1.7 3
JC
JA
, a P-channel FET from Fairchild, such as
S
is calculated as follows:
14.7 C/W
R
S
(1.5 I
0.05
O
)
CA
less than half of
m
and ca-
REV. A