ADP3419 Analog Devices, ADP3419 Datasheet - Page 3
![no-image](/images/manufacturer_photos/0/0/56/analog_devices_sml.jpg)
ADP3419
Manufacturer Part Number
ADP3419
Description
High Voltage MOSFET Driver
Manufacturer
Analog Devices
Datasheet
1.ADP3419.pdf
(16 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ADP34190091RMZR
Manufacturer:
ON
Quantity:
88 432
Part Number:
ADP34190091RMZR
Manufacturer:
ON
Quantity:
20 000
Part Number:
ADP3419JRM
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
ADP3419JRM(P9B)
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Company:
Part Number:
ADP3419JRMZ
Manufacturer:
AD
Quantity:
2 825
Part Number:
ADP3419JRMZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Company:
Part Number:
ADP3419JRMZ-REEL
Manufacturer:
ON Semiconductor
Quantity:
4 700
Part Number:
ADP3419JRMZ-REEL
Manufacturer:
ON/安森美
Quantity:
20 000
Company:
Part Number:
ADP3419JRMZ-REEL-O
Manufacturer:
SIRENZA
Quantity:
3 900
www.datasheet4u.com
SPECIFICATIONS
VCC = SD = 5 V, BST = 4 V to 26 V, T
All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC) methods.
Table 1.
Parameter
LOGIC INPUTS (IN, SD, DRVLSD, CROWBAR)
HIGH-SIDE DRIVER
LOW-SIDE DRIVER
SUPPLY
1
2
3
For propagation delays, t
The turn-on of DRVL is initiated after IN goes low by either SW crossing a ~1 V threshold or by expiration of t
Guaranteed by characterization, not production tested.
Input Voltage High
Input Voltage Low
Input Current
DRVLSD Propagation Delay Time
Output Resistance, Sourcing Current
Output Resistance, Sinking Current
Transition Times
Propagation Delay Times
Output Resistance, Sourcing Current
Output Resistance, Sinking Current
Transition Times
Propagation Delay Times
SW Transition Timeout
Zero-Crossing Threshold
Supply Voltage Range
Supply Current
Undervoltage Lockout Threshold
Undervoltage Lockout Hysteresis
Normal Mode
Shutdown Mode
pdh
refers to the specified signal going high, and t
2
1
1, 2
3
A
= 0°C to 100°C, unless otherwise noted.
Symbol
V
V
I
t
t
t
t
t
t
t
t
t
t
t
V
V
I
I
IN
SYS(NM)
SYS(SD)
pdl DRVLSD
pdh DRVLSD
rDRVH
fDRVH
pdhDRVH
pdlDRVH
rDRVL
fDRVL
pdhDRVL
pdlDRVL
SWTO
IH
IL
ZC
CC
,
Conditions
Inputs = 0 V or 5 V
C
BST − SW = 4.6 V
BST − SW = 4.6 V
BST − SW = 4.6 V, C
BST − SW = 4.6 V, C
BST − SW = 4.6 V, C
BST − SW = 4.6 V, C
C
C
C
C
BST − SW = 4.6 V
I
I
VCC rising
VCC falling
CC
CC
LOAD
LOAD
LOAD
LOAD
LOAD
Rev. A | Page 3 of 16
+ I
+ I
pdl
refers to the signal going low with transitions measured at 50%.
BST
BST
= 3 nF, Figure 3
= 3 nF, Figure 4
= 3 nF, Figure 4
= 3 nF, Figure 4
= 3 nF, Figure 4
, IN = 0 V or 5 V
, SD = 0 V
LOAD
LOAD
LOAD
LOAD
= 3 nF, Figure 4
= 3 nF, Figure 4
= 3 nF, Figure 4
= 3 nF, Figure 4
SWTO
.
Min
2.0
−1
15
150
4.6
3.8
50
Typ
20
1.7
0.8
14
11
32
28
1.7
0.8
13
11
25
16
350
1
0.8
325
4.25
120
Max
0.8
+1
3.3
2.3
35
25
70
60
3.3
2.3
30
25
48
30
600
6
1.5
600
4.5
ADP3419
Unit
V
V
µA
ns
Ω
Ω
ns
ns
ns
ns
Ω
Ω
ns
ns
ns
ns
ns
V
V
mA
µA
V
mV