S1A0903X01-Q0R0 Samsung Electronics, S1A0903X01-Q0R0 Datasheet - Page 28

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S1A0903X01-Q0R0

Manufacturer Part Number
S1A0903X01-Q0R0
Description
AM/FM 1 Chip Tuner with PLL
Manufacturer
Samsung Electronics
Datasheet
S1A0903X01
28
DSR's
If rising edge of Fc is slower than that of Fr, set Vpd to low
If rising edge of Fc is faster than that of Fr, set Vpd to high
A region with no
When data are changed in OS[1:0], N[15:0] or changed in R[3:0] from PLL stop mode.
Data
VPD
CE
Error pulse is made from rising edge of Fr and Fc.
Fc
Fr
make the frequency of Fc fast. (Figure. 9 state1)
make the frequency of Fc slow. (Figure. 9 state3)
reset Fc and Fr counter(Figure. 12 A) and change PFD in state 2
After new data is latched, accurate
Lock time can be estimated in advance depending on N[15:0] or OS[1:0] is changed
Old data
z
Error makes Vpd high impedance and hold the frequency of Fc
A
Figure 12. PFD and PD Output Relationship
Error can be reflected on the first phase error(Figure. 12 B)
B
New data ( OS[1:0] or N[15:0] is changed )
z
z
AM/FM 1CHIP TUNER WITH PLL
z
z

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