AD9853 Analog Devices, AD9853 Datasheet - Page 5

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AD9853

Manufacturer Part Number
AD9853
Description
Programmable Digital OPSK/16-QAM Modulator
Manufacturer
Analog Devices
Datasheet

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REV. C
Modulation Encoding Format
Output Carrier Frequency Range
Serial Input Data Rate
Pulse-Shaping FIR Filter
Interpolation Range
Maximum Reference Clock Frequency
6 REFCLK
R-S FEC
I/Q Channel Spectrum
Preamble Insertion
Randomizer
*In FSK mode, F0:F1 are direct DDS Cosine output. The two interpolator stages of the AD9853 are not used in the FSK mode and should be programmed for
maximum interpolation rates to reduce unnecessary current consumption. This means that Interpolator #1 should be set to a decimal value of 31, and Interpolator
#2 should be set to decimal value of 63. This is easily accomplished by programming Registers 12 and 13 (hex) with the values of FF (hex).
FSK*, QPSK, DQPSK, 16-QAM, D16-QAM, Selectable via Control Bus
DC – 63 MHz with +3.3 V Supply Voltage
DC – 84 MHz with +5 V Supply Voltage
Evenly Divisible Fraction of Reference Clock
41 Tap, Linear Phase, 10-Bit Coefficients Fully Programmable via Control Bus
Interpolation Rate = (4/M) (ICIC1) (ICIC2) where: M = 2 for QPSK, M = 4 for 16-QAM
Minimum and Maximum Rates
These are the minimum and maximum interpolation ratios from the input data rate to the
system clock. The interpolation range is a function of the fixed interpolation factor of four
in the FIR filters, the programmed CIC filter interpolation rates (ICIC1, ICIC2), as well
as system timing constraints.
+3.3 V Supply: 21 MHz with 6 REFCLK enabled, 126 MHz with 6 REFCLK disabled
+5 V Supply: 28 MHz with 6 REFCLK enabled, 168 MHz with 6 REFCLK disabled
Fixed 6 reference clock multiplier, enable/disable control via control bus
Enable/disable via control bus and dedicated control pin. Control pin enable/disable function:
Logic “1” = Enable
Logic “0” = Disable
Primitive Polynomial: p(x) = x
Code Generator Polynomial: g(x) = (x +
Selectable via Control Bus
FEC/Randomizer can be transposed in signal chain via control bus.
I
0–96 Bits, Programmable Length and Content
Enable/Disable Control via Control Bus
Generating Polynomial:
Randomizer and FEC blocks can be transposed in signal chain, via control bus.
Minimum Interpolation Rate—QPSK = 2
Maximum Interpolation Rate—QPSK = 2 31
t = 0–10 (Programmable)
Codeword Length (N) = 255 max (Programmable)
N = K + 2 t (K Range = 16
x
or
x
Table I. Modulator Function Description
COS + Q
6
15
+ x
+ x
5
14
+ 1, Programmable Seed (Davic/DVB-Compliant)
+ 1, Programmable Seed (DOCSIS-Compliant)
SIN (default) or I COS – Q
–5–
8
K
+ x
16-QAM = 1
16-QAM = 1
4
255 – 2 t)
+ x
3
+ x
0
)(x +
2
3
+ 1
SIN, selectable via control bus.
4
31
2 = 12
1
)(x +
63 = 3906
3 = 12
63 = 1953
2
) . . . (x +
2t –1
AD9853
)

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