AD9889 Analog Devices, AD9889 Datasheet - Page 21

• Manufacturer Part Number: AD9889
• Description: High Performance HDMI/DVI Transmitter
• Manufacturer: Analog Devices

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DataSheet
4
2-WIRE SERIAL REGISTER MAP
The AD9889 is initialized and controlled by a set of registers that determine the operating modes. An external controller is employed to
write and read the control registers through the two-line serial interface port.
Table 22. Control Register Map
Hex
Address
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
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Read/Write
Read/Write or Read
Only
Read
Read/Write
Read/Write
Read/Write
Read
Read
Read
Read/Write
Read/Write
Read/Write
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Bits
[7:0]
[3:0]
[7:0]
[7:0]
[7:4]
[3:0]
[7:0]
[7:0]
[3:0]
[7:0]
[7:0]
[7]
[6:5]
[4]
[3]
[2]
[1:0]
Default
Value
00000000
****0000
00000000
00000000
0000****
****0000
00000000
00000000
****0000
00000000
00000000
0*******
*10*****
***0****
****0***
*****0**
******01
Register Name
Chip Revision
N[19:16]
N[15:8]
N[7:0]
S/PDIF_SF
CTS_Int[19:16]
CTS_Int[15:8]
CTS_Int[7:0]
CTS_Ext[19:16]
CTS_Ext[15:8]
CTS_Ext[7:0]
CTS_Sel
Avg_Mode
Audio_Sel
MCLK_SP
MCLK_I
MCLK_Ratio
Rev. 0 | Page 21 of 48
2
S
Low byte of external CTS.
Description
Revision of the chip, start from 0.
20-bit N used with cycle time stamp (CTS) (see Table 18
to Table 20 for appropriate settings) to regenerate the
audio clock in the receiver. For remaining bits, see
R0x02 and R0x03. Used only with I
The middle byte of N.
The lower byte of N.
S/PDIF sampling frequency for S/PDIF audio decoded
from hardware. This information is used by both the
audio Rx and the pixel repetition.
0011 = 32 kHz.
0000 = 44.1 kHz.
0010 = 48 kHz.
1000 = 88.2 kHz.
1010 = 96 kHz.
1100 = 176.4 kHz.
1110 = 192 kHz.
Default = 0x0.
CTS measured (internal). This 20-bit value is used in
the receiver with the N value to regenerate an audio
clock. For remaining bits, see R0x05 and R0x06.
Middle byte of measured CTS.
Low byte of measured CTS.
CTS (external). This 20-bit value is used in the receiver
with the N value to regenerate an audio clock. For
remaining bits see R0x08 and R0x09.
Middle byte of external CTS.
CTS source select.
0 = internal CTS.
1 = external CTS.
Default = 0.
CTS filter mode.
00 = no filter.
01 = divide by 4.
10 = divide by 8.
11 = divide by16.
Default = 10.
Audio type select.
0 = I
1 = S/PDIF.
Default = 0.
MCLK for S/PDIF.
1 = MCLK active.
0 = MCLK inactive.
Default = 0.
MCLK for I
1 = I
0 = I
Default = 0.
MCLK ratio.
2
2
2
S.
S MCLK active.
S MCLK inactive.
2
S.
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S audio, not S/PDIF.
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