MAX106CHC Maxim, MAX106CHC Datasheet - Page 19

• Manufacturer Part Number: MAX106CHC
• Description: 5V / 600Msps / 8-Bit ADC with On-Chip 2.2GHz Bandwidth Track/Hold Amplifier
• Manufacturer: Maxim

The dynamic performance of the data converter is
essentially unaffected by clock-drive power levels from
-10dBm (100mV clock signal amplitude) to +10dBm
(1V clock signal amplitude). The MAX106 dynamic per-
formance specifications are determined by a single-
ended clock drive of +4dBm (500mV clock signal
amplitude). To avoid saturation of the input amplifier
stage, limit the clock power level to a maximum of
+10dBm.
The advantages of differential clock drive (Figure 13b,
Table 5) can be obtained by using an appropriate
balun or transformer to convert single-ended sine-wave
sources into differential drives. The precision on-chip
laser-trimmed 50Ω clock-termination resistors ensure
excellent amplitude matching. See Single-Ended Clock
Figure 13a. Single-Ended Clock Input Signals
Figure 13c. Single-Ended ECL Clock Drive
NOTE: CLKCOM = 0V
+0.5V
-0.5V
-0.8V
-1.8V
NOTE: CLKCOM = -2V
Differential Clock Inputs (Sine-Wave Drive)
______________________________________________________________________________________
2.2GHz Bandwidth Track/Hold Amplifier
±5V, 600Msps, 8-Bit ADC with On-Chip
CLK+
CLK+
CLK- = 0V
CLK- = -1.3V
t
t
Inputs (Sine-Wave Drive) for proper input amplitude
requirements.
Configure the MAX106 for single-ended ECL clock
drive by connecting the clock inputs as shown in Figure
13c (Table 5). A well-bypassed V
essential to avoid coupling noise into the undriven
clock input, which would degrade the dynamic perfor-
mance.
The MAX106 may be driven from a standard differential
(Figure 13d, Table 5) ECL clock source by setting the
clock termination voltage at CLKCOM to -2V. Bypass
the clock-termination return (CLKCOM) as close to the
ADC as possible with a 0.01µF capacitor connected to
GNDI.
Figure 13b. Differential Clock Input Signals
Figure 13d. Differential ECL Clock Drive
+0.5V
-0.8V
-1.8V
NOTE: CLKCOM = -2V
-0.5V
NOTE: CLKCOM = 0V
Single-Ended Clock Inputs (ECL Drive)
Differential Clock Inputs (ECL Drive)
CLK+
CLK+
BB
supply (-1.3V) is
CLK-
CLK-
t
t
19