LM2403 National Semiconductor Corporation, LM2403 Datasheet - Page 4

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LM2403

Manufacturer Part Number
LM2403
Description
Monolithic Triple 4.5 CRT Driver
Manufacturer
National Semiconductor Corporation
Datasheet

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Theory of Operation
The LM2403 is a high voltage monolithic three channel CRT
driver suitable for high resolution display applications. The
LM2403 operates using 80V and 12V power supplies. The
part is housed in the industry standard 11-lead TO-220
molded plastic power package.
The simplified circuit diagram of the LM2403 is shown in Fig-
ure 1 . A PNP emitter follower, Q1, provides input buffering.
The 14 k feedback resistor and the 1 k input resistor sets
the gain of the inverting op-amp to -14. Emitter followers Q2
and Q3 isolate the output of the feedback amplifier from the
capacitance of the CRT cathode, and make the circuit rela-
tively insensitive to load capacitance.
Figure 2 shows a typical test circuit for evaluation of the
LM2403. This circuit is designed to allow testing of the
LM2403 in a 50
sive FET probe. In this test circuit, two low inductance resis-
tors in series totaling 4.95 k form a 100:1 wideband low ca-
pacitance probe when connected to a 50
The input signal from the generator is ac coupled to the base
of Q1.
Figure 9 shows the large signal sine wave frequency re-
sponse of the LM2403. The frequency response rolls off very
rapidly above the bandwidth limit of the amplifier. There are
two reasons for this fast response roll-off:
1. The LM2403 contains an input low pass filter to help re-
2. The internal feedback network of the closed loop ampli-
In both cases, the fast roll of the high frequency harmonics
will help to limit the creation of high frequency EMI harmon-
ics, without limiting video rise and fall time characteristics.
However, due to the very fast switching speeds of the de-
move unwanted high frequency harmonics that can
cause EMI problems. This filter does not significantly af-
fect the rise and fall times of the signal as it operates
above the −3 dB bandwidth of the device.
fier holds the gain at −14 until the loop gain drops below
unity. Above this frequency, the amplifier response falls
with the open loop gain of the amplifier, as the feedback
ceases to have any significant effect. There is also a
change in the impedance match between the op-amp
and the emitter follower output stage with large signals
at higher frequencies. This creates a gain boost that ex-
tends the bandwidth, then gives a sudden roll off as
shown in Figure 9 . The exact response of this roll off
may vary slightly depending upon operating conditions,
signal amplitude etc.
environment without the use of an expen-
FIGURE 9.
DS100082-16
cable and load.
4
vice, good layout design for EMI is CRITICAL. Path lengths
and loop areas of the video signals must be kept to a mini-
mum.
Application Hints
INTRODUCTION
National Semiconductor (NSC) is committed to providing ap-
plication information that assists our customers in obtaining
the best performance possible from our products. The follow-
ing information is provided in order to support this commit-
ment. The reader should be aware that the optimization of
performance was done using a specific printed circuit board
designed at NSC. Variations in performance can be realized
due to physical changes in the printed circuit board and the
application. Therefore, the designer should know that com-
ponent value changes may be required in order to optimize
performance in a given application. The values shown in this
document can be used as a starting point for evaluation pur-
poses. When working with high bandwidth circuits, good lay-
out practices are also critical to achieving maximum perfor-
mance.
POWER SUPPLY BYPASS
Since the LM2403 is a high bandwidth amplifier, proper
power supply bypassing is critical for optimum performance.
Improper power supply bypassing can result in large over-
shoot, ringing and oscillation. A 0.1 µF capacitor should be
connected from the supply pin, Vcc, to ground, as close to
the supply and ground pins as is practical. Additionally, a
10 µF to 100 µF electrolytic capacitor should be connected
from the supply pin to ground. The electrolytic capacitor
should also be placed reasonably close to the LM2403’s
supply and ground pins. A 0.1µF capacitor should be con-
nected from the bias pin, Vbb, to ground, as close as is prac-
tical to the part.
ARC PROTECTION
During normal CRT operation, internal arcing may occasion-
ally occur. Spark gaps, in the range of 200V, connected from
the CRT cathodes to CRT ground will limit the maximum volt-
age, but to a value that is much higher than allowable on the
LM2403. This fast, high voltage, high energy pulse can dam-
age the LM2403 output stage. The application circuit shown
in Figure 10 is designed to help clamp the voltage at the out-
put of the LM2403 to a safe level. The clamp diodes should
have a fast transient response, high peak current rating, low
series impedance and low shunt capacitance. FDH400 or
equivalent diodes are recommended. D1 and D2 should
have short, low impedance connections to V
respectively. The cathode of D1 should be located very close
to a separately decoupled bypass capacitor. The ground
connection of the diode and the decoupling capacitor should
be very close to the LM2403 ground. This will significantly re-
duce the high frequency voltage transients that the LM2403
would be subjected to during an arcover condition. Resistor
R2 limits the arcover current that is seen by the diodes while
R1 limits the current into the LM2403 as well as the voltage
stress at the outputs of the device. R2 should be a 1/2W
solid carbon type resistor. R1 can be a 1/4W metal or carbon
film type resistor. Inductor L1 is critical to reduce the initial
high frequency voltage levels that the LM2403 would be sub-
jected to. Having large value resistors for R1 and R2 would
be desirable, but this has the effect of increasing rise and fall
times. The inductor will not only help protect the device but it
CC
and ground

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