MAX11040K Maxim Integrated Products, MAX11040K Datasheet - Page 11

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MAX11040K

Manufacturer Part Number
MAX11040K
Description
(MAX11040K / MAX11060) Sigma-Delta ADCs
Manufacturer
Maxim Integrated Products
Datasheet

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PIN
22
23
24
25
26
30
32
33
34
36
37
38
DRDYOUT
DRDYIN
NAME
AIN3+
AIN2+
AVDD
SYNC
XOUT
AIN3-
AIN2-
REF3
REF2
XIN
24-/16-Bit, 4-Channel, Simultaneous-Sampling,
______________________________________________________________________________________
Active-Low Data Ready Output. When DRDYIN = 0, DRDYOUT outputs a logic-low to indicate the
availability of a new conversion result. DRDYOUT transitions high at the next CS falling edge or when
DRDYIN = 1. See the Multiple Device Connection section.
Active-Low Data Ready Input. A logic-high at DRDYIN causes DRDYOUT to output a logic-high. When
DRDYIN = 0, DRDYOUT outputs a logic-low when a new conversion result is available. See the Multiple
Device Connection section. Connect DRDYIN to DGND when not daisy chaining multiple devices.
Sampling Synchronization Input. The falling edge of SYNC aligns sampling and output data so that
multiple devices sample simultaneously. Synchronize multiple devices running from independent crystals
by connecting DRDYOUT of the last device in the chain to the SYNC inputs of all devices in the chain.
Connect SYNC to DGND for single device operation. See the Multiple Device Connection section.
Crystal Oscillator Output. Connect a 24.576MHz external crystal or resonator between XIN and XOUT
when using the internal oscillator. Leave XOUT unconnected when driving with an external frequency. See
the Crystal Oscillator section.
Crystal Oscillator/Clock Input. Connect a 24.576MHz external crystal or resonator between XIN and XOUT
when using the internal oscillator or drive XIN with an external clock and leave XOUT unconnected. See
the Crystal Oscillator section.
Positive Analog Supply Voltage. Bypass to AGND with a 1μF capacitor in parallel with a 0.01μF capacitor
as close as possible to the device.
ADC3 Buffered Reference Voltage. Bypass with a 1μF capacitor to AGND.
Positive Analog Input Channel 3
Negative Analog Input Channel 3
ADC2 Buffered Reference Voltage. Bypass with a 1μF capacitor to AGND.
Positive Analog Input Channel 2
Negative Analog Input Channel 2
Cascadable, Sigma-Delta ADCs
FUNCTION
Pin Description (continued)
11
Datasheet pdf - http://www.DataSheet4U.net/

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