MAX1457 Maxim, MAX1457 Datasheet - Page 4

• Manufacturer Part Number: MAX1457
• Description: 0.1%-Accurate Signal Conditioner for Piezoresistive Sensor Compensation
• Manufacturer: Maxim

0.1%-Accurate Signal Conditioner
for Piezoresistive Sensor Compensation
4
______________________________________________________________Pin Description
SO
—
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
_______________________________________________________________________________________
1
2
3
4
5
6
7
8
9
PIN
22, 32
TQFP
4, 16,
28
29
30
31
10
11
12
13
14
15
17
18
19
20
21
23
24
25
26
27
1
2
3
5
6
7
8
9
LINDACREF
FSOTCDAC
FSOTCOUT
OFSTDAC
AMPOUT
OTCDAC
FSODAC
BDRIVE
LINOUT
LINDAC
VBBUF
NAME
NBIAS
AGND
AMP+
VOUT
ECLK
FOUT
AMP-
FADJ
ISRC
EDO
MCS
N.C.
ECS
INM
V
V
INP
EDI
DD
SS
Positive Sensor Input. Input impedance >1M
Negative Sensor Input. Input impedance >1M
Positive Input of General-Purpose Operational Amplifier
Negative Input of General-Purpose Operational Amplifier
Output of General-Purpose Operational Amplifier. High impedance when MCS is low.
Sensor Excitation Current. This pin drives a nominal 0.5mA through the sensor.
PGA Output Voltage. Connect a 0.1µF capacitor from VOUT to V
MCS is low.
Not internally connected.
Current-Source Reference. Connect a 50k resistor from ISRC to V
Buffered FSO TC DAC Output. Tie to ISRC with a resistor (R
Buffered Bridge Voltage (the voltage at BDRIVE). Leave unconnected if unused.
Buffered FSO Linearity DAC Output. Use a resistor (R
to ISRC to correct second order FSO nonlinearity errors. Leave unconnected if not
correcting second order FSO nonlinearity errors.
Reference Input to FSO Linearity DAC. Normally tied to VOUT.
FSO Linearity DAC Output Voltage. Connect 0.1µF capacitor from LINDAC to V
Negative Power Supply Input
OFFSET TC DAC Output Voltage. Connect a 0.1µF capacitor from OTCDAC to V
FSO DAC Output Voltage. Connect a 0.1µF capacitor from FSODAC to V
FSO TC DAC Output Voltage. Connect a 0.1µF capacitor from FSOTCDAC to V
OFFSET DAC Output Voltage. Connect a 0.1µF capacitor from OFSTDAC to V
Serial Input (data from EEPROM), active high. CMOS logic-level input pin through which the
MAX1457’s internal registers are updated with EEPROM coefficients. Disabled when MCS is
low.
Serial Output (data to EEPROM), active high. CMOS logic-level output pin through which
the MAX1457 gives external commands to the EEPROM. Temperature-compensation data
is available through this pin. Becomes high impedance when MCS is low.
CMOS Logic-Level Clock Output for external EEPROM. High impedance when MCS is low.
Chip-Select Output for external EEPROM. CMOS logic-level output pin through which the
MAX1457 enables/disables EEPROM operation. High impedance when MCS is low.
Frequency Output. Internal oscillator output signal. Normally left open.
Frequency Adjust. Connect to V
quency to 100kHz. Connect a 0.1µF bypass capacitor from FADJ to V
Master Chip Select. The MAX1457 is selected when MCS is high. Leave unconnected for
normal operation (internally pulled up to V
be required in noisy environments.
Bias Setting Pin. Connect to V
capacitor from NBIAS to V
Mid-Supply Reference for Analog Circuitry. Connect a 0.1µF capacitor from V
Positive Power-Supply Input. Connect a 0.1µF capacitor from V
SS
.
DD
SS
with a 400k resistor (R
with a 1.5M resistor (R
FUNCTION
DD
with 1M resistor). External 5kΩ pull-up may
Rail-to-rail input range.
Rail-to-rail input range.
LIN
) greater than 100k , from LINOUT
BIAS
OSC
STC
). Connect a 0.1µF bypass
) to set internal oscillator fre-
DD
≥ 50k ).
SS
to V
. High impedance when
SS
.
SS
SS
.
SS
.
.
SS
SS
SS
SS
SS
.
to AGND.
.
.
.