ATA5275 ATMEL Corporation, ATA5275 Datasheet - Page 7

• Manufacturer Part Number: ATA5275
• Description: Integrated 1.5 A peak current BCDMOS antenna driver IC dedicated as a 125 kHz wake-up channel transmitter for TPM applications
• Manufacturer: ATMEL Corporation

Reset
DIO Interface
Oscillator and Carrier
Frequency Generation
Self-oscillating Mode
Resonance Tracking Mode
Coil Driver Output and
Antenna Peak Current
Control
4739B–AUTO–10/04
After power on or after a voltage breakdown the power-on-reset circuit of the IC gener-
ates a reset pulse which sets the logic circuit to a defined initial state. A RESET is
generated if the VCC is below the reset threshold voltage V
The interface can be operated either as a 5-V microcontroller interface or as automotive
K-line interface with the car battery voltage. In which mode it operates must be selected
with the VDIO pin. If it is connected to 5 V the DIO pin operates as microcontroller inter-
face and if it is connected with the battery voltage it operates as automotive interface
according to the K-line specification.
A Voltage Controlled Oscillator (VCO) is used to clock the interface logic and the gate
driver logic. The antenna driver output signal DRV is derived from this clock. The VCO
operates in two modes: the self-oscillation mode with clock CLK
tracking mode with clock CLK
If the antenna half-bridge is not activated the VCO is in self-oscillating mode. It runs at a
center frequency CLK
pose, an external reference resistor has to be applied to pin REXT. The resistor at pin
REXT determines the VCO frequency proportionally. The recommended value is 100 k
achieving 125 kHz oscillator frequency.
In case the antenna half-bridge is activated the VCO is tracked by the antenna current
by means of it zero crossing detection. The VCO runs at the antenna resonance fre-
quency stationary. The clock CLK
frequency, depending on the antenna quality and resonance frequency (see section
“Application Hints”). For that purpose, an antenna current shunt resistor has to be
applied to the SENSE pin. The shunt resistance is used internally for the zero crossing
detection of the antenna current only.
By this feature the antenna operates with the maximum voltage, current and field
strength. It is recommended specially for systems with high antenna Q-factors and low
LC tolerances.
The driver circuit consists on a DMOS half-bridge designed for 1.5 A peak current with
low on-resistance RDSON. It is short-circuit and overtemperature protected (see section
“Diagnosis and Protection”). The half-bridge is switched on by a low level signal at DIO
and generates a square wave voltage for the antenna RLC circuitry.
A very useful function of the driver stage is the build-in antenna current control loop. The
IC senses the current through the antenna internally and controls the peak value IA
by controlling the duty cycle DC
So the antenna can be designed for maximum antenna current with the typical or even
the minimum supply voltage. For higher supply voltages the current is controlled by
reducing the driver duty cycle. The reference value for the antenna current IA
be adjusted externally with a resistor R
Note:
IA
PEAK
Applying the formula above, the right driver current for the antenna has to be adjusted for
the worst supply voltage case. The IC operates from 14% up to 86% duty cycle for that
case and reduces the duty cycle for higher voltages (for the definition of the duty cycle
D
=
DRV
750 mA
, see “Application Hints” on page 13).
50 k
-------------- -
SO
R
CR
of typically 125 kHz with an accuracy of ±1.6%. For that pur-
RT
DRV
.
of the driver output.
RT
CR
deviates ±1.4% from the antenna resonance
at the RCR pin.
ATA5275 [Preliminary]
POR
and after power on.
SO
and the resonance
PEAK
PEAK
can
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