ATA5761 ATMEL Corporation, ATA5761 Datasheet - Page 26
ATA5761
Manufacturer Part Number
ATA5761
Description
UHF Ask/fsk Receiver
Manufacturer
ATMEL Corporation
Datasheet
1.ATA5761.pdf
(41 pages)
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Table 11-10. Effect of the Configuration Word Lim_min
Note:
Table 11-11. Effect of the Configuration Word Lim_max
Note:
26
Lim_max5
Lim_min5
0
0
0
..
1
..
1
1
1
0
0
0
..
0
..
1
1
1
1. Lim_min is also used to determine the margins of the data clock control logic (see section
1. Lim_max is also used to determine the margins of the data clock control logic (see section
ATA5760/ATA5761
Lim_max4
Lim_min4
Lim_max
0
0
0
..
0
..
1
1
1
Lim_min
0
0
0
..
1
..
1
1
1
(1)
(1)
Lim_max3
Lim_min3
(Lim_max < 12 is not applicable)
(Lim_min < 10 is not Applicable)
1
1
1
..
1
..
1
1
1
1
1
1
..
0
..
1
1
1
Lim_max2
Lim_min2
1
1
1
..
0
..
1
1
1
0
0
1
..
1
..
1
1
1
Lim_max1
Lim_min1
0
0
1
..
0
..
0
1
1
1
1
0
..
0
..
0
1
1
Lim_max0
Lim_min0
0
1
0
..
1
..
1
0
1
0
1
0
..
1
..
1
0
1
(TLim_max = (Lim_max – 1)
(TLim_max = 661 µs for f
(T
T
BR_Range0, TLim_max = 627 µs for
Lim_min
Lim_min
(T
Upper Limit Value for Bit Check
f
Lower Limit Value for Bit Check
RF
Lim_min
= 915 MHz and BR_Range0)
= 347 µs for f
= 329 µs for f
“Data Clock” on page
“Data Clock” on page
= Lim_min
BR_Range0)
41 (default)
BR_Range0
21 (default)
12
13
14
61
62
63
10
11
12
61
62
63
RF
RF
RF
= 868.3 MHz and
= 868.3 MHz and
= 915 MHz and
XLim
4896D–RKE–08/08
XLim
18).
18).
T
Clk
T
)
Clk
)
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