ATA6870 ATMEL Corporation, ATA6870 Datasheet - Page 36

• Manufacturer Part Number: ATA6870
• Manufacturer: ATMEL Corporation

7.6.5
7.6.5.1
Table 7-20.
Table 7-21.
36
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Note:
13.1 Low level output voltage
13.2 Low level output current
13.3 High level output current
14.1 Low level output current
14.2 High level output current
No. Parameters
No. Parameters
1. MOSI_OUT, SCK_OUT, CS_N_OUT, CLK_OUT
ATA6870 [Preliminary]
Digital Inputs and Outputs
Digital Output Characteristics
Electrical Characteristics
Electrical Characteristics
Digital Output Characteristics (MISO, IRQ)
If the ATA6870 is configured as first IC (master) in a string (MFIRST = 1), these pins are config-
ured as an open drain output. If the ATA6870 is configured to be a stacked IC (MFIRST = 0), the
output signals MISO and IRQ coming from the upper IC need to be transferred to the MISO and
IRQ outputs of the master in the string via the MISO_IN and IRQ_IN inputs. In this case the
MISO and IRQ outputs act as level shifters based on current sources.
Digital Output Characteristics (MOSI_OUT, SCK_OUT, CS_N_OUT, CLK_OUT)
These outputs act as level shifters based on current sources. They transfer the input signals
MOSI_OUT, SCK_OUT, CS_N_OUT, CLK_OUT to the next IC above. If the ATA6870 is the IC
on the top level of a string, these outputs must be connected to VDDHV.
±0.3V, MFIRST = 0
Test Conditions
I
MFIRST = 1
±0.3V, MFIRST = 0
Test Conditions
VDDHV + 1V to
VDDHV + 2V
VDDHV + 1V to
VDDHV + 2V
OUT
= +5 mA
MISO, IRQ
MISO, IRQ
MISO, IRQ
Pin
Pin
(1)
(1)
V
I
I
Symbol
Symbol
MISO
MISO
MISO
V
V
(1)
(1)
, V
, I
, I
IRQ
IRQ
IRQ
Min.
Min.
–13
–65
25
–1
Typ.
Typ.
0.2
Max.
Max.
VDD
–40
–8
55
+1
Unit
Unit
9116B–AUTO–10/09
µA
µA
µA
µA
V
Type*
Type*
A
A
A
A
A