MAX1790 Maxim, MAX1790 Datasheet - Page 9

• Manufacturer Part Number: MAX1790
• Description: Low-Noise Step-Up DC-DC Converter
• Manufacturer: Maxim

breakdown voltage exceeds V
recommended.
Low-ESR capacitors are recommended for input
bypassing and output filtering. Low-ESR tantalum
capacitors are a good compromise between cost and
performance. Ceramic capacitors are also a good
choice. Sanyo OS-CON types are also recommended
for their low ESR. Avoid standard aluminum electrolytic
capacitors. A simple equation to estimate input and
output capacitor values for a given voltage ripple is as
follows:
where V
capacitor.
The MAX1790 operates with an adjustable output from
V
(Typical Operating Circuit) from the output to GND.
Select the resistor values as follows:
where V
1.24V. Since the input bias current into FB is typically 0,
R2 can have a value up to 100kΩ without sacrificing
accuracy. Connect the resistor-divider as close to the IC
as possible.
The voltage feedback loop needs proper compensation
to prevent excessive output ripple and poor efficiency
caused by instability. This is done by connecting a
resistor (R
COMP to GND, and another capacitor (C
COMP to GND. R
quency integrator gain for fast transient response, while
C
loop stability. The second capacitor, C
sen to cancel the zero introduced by output capaci-
tance ESR. For optimal performance, choose the
components using the following equations:
IN
COMP
R
C
C
COMP
COMP
COMP2
to 12V. Connect a resistor voltage divider to FB
Input and Output Capacitor Selection
RIPPLE
is chosen to set the integrator zero to maintain
FB
≅ (200Ω / A
≅ (0.4 · 10
COMP
, the boost-regulator feedback set point, is
≅ (0.005 A
C
is the peak-to-peak ripple voltage on the
) and capacitor (C
≥
R
_______________________________________________________________________________________
COMP
0.5
V
1
-3
RIPPLE
=
2
2
) · V
A / Ω) L / V
R
/ Ω) R
⋅
2
is chosen to set the high-fre-
L



OUT 2
V
Low-Noise Step-Up DC-DC Converter
⋅
V
OUT
⋅
ESR
FB



Loop Compensation
OUT
V
I
PK
OUT
· C
· L / V
IN
−
2
. Schottky diodes are
COMP
OUT
1






Output Voltage
OUT 2
/ L
COMP2
) in series from
COMP2
, is cho-
) from
For the ceramic output capacitor, where ESR is small,
C
external component values for several applications.
The best gauge of correct loop compensation is by
inspecting the transient response of the MAX1790.
Adjust R
mal transient performance.
The soft-start capacitor should be large enough that it
does not reach final value before the output has
reached regulation. Calculate C
where:
C
capacitor on the output bus
V
I
I
V
The load must wait for the soft-start cycle to finish
before drawing a significant amount of load current.
The duration after which the load can begin to draw
maximum load current is:
Figure 3 shows the MAX1790 in a single-ended primary
inductance converter (SEPIC) topology. This topology is
useful when the input voltage can be either higher or
lower than the output voltage, such as when converting
a single lithium-ion (Li+) cell to a 3.3V output. L1A and
L1B are two windings on a single inductor. The coupling
capacitor between these two windings must be a low-
ESR type to achieve maximum efficiency, and must also
be able to handle high ripple currents. Ceramic capaci-
tors are best for this application. The circuit in Figure 3
provides 400mA output current at 3.3V output when
operating with an input voltage from +2.6V to +5.5V.
Figure 4 shows a power supply for active matrix (TFT-
LCD) flat-panel displays. Output voltage transient per-
formance is a function of the load characteristic. Add or
remove output capacitance (and recalculate compen-
sation network component values) as necessary to
meet transient performance. Regulation performance
INRUSH
OUT
OUT
IN
COMP2
OUT
C
SS
= minimum input voltage
= maximum output current during power-up stage
= maximum output voltage
>
= total output capacitance including any bypass
21 10
COMP
= peak inrush current allowed
is optional. Table 1 shows experimentally verified
⋅
−
and C
6
t
⋅
MAX
1-Cell to 3.3V SEPIC Power Supply
C
OUT
COMP
= 6.77 · 10



V
IN
as necessary to obtain opti-
Soft-Start Capacitor
Application Circuits
⋅
V
SS
OUT
I
INRUSH
5
AMLCD Application
to be:
C
2
SS
−
V
−
IN
I
OUT
⋅
V
OUT
⋅
V
OUT



9