MAX2066 Maxim Integrated Products, MAX2066 Datasheet - Page 15

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MAX2066

Manufacturer Part Number
MAX2066
Description
Serial/Parallel-Controlled Digital VGA
Manufacturer
Maxim Integrated Products
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MAX2066ETL+
Manufacturer:
Maxim Integrated Products
Quantity:
135
1, 16, 19, 22,
24–28, 30,
31, 33–36
2, 3, 32,
37–40
PIN
10
11
12
13
14
15
17
18
20
21
23
29
4
5
6
7
8
9
VDD_LOGIC
ATTEN_OUT
AMP_OUT
VC C _AMP
ATTEN_IN
SER/PAR
STATE_A
STATE_B
AMP_IN
______________________________________________________________________________________
NAME
DATA
RSET
GND
GND
CLK
CS
D4
D3
D2
D1
D0
EP
Serial/Parallel-Controlled Digital VGA
Ground
Ground. See the Pin-Compatibility Considerations section.
SPI Data Digital Input
SPI Clock Digital Input
SPI Chip-Select Digital Input
Digital Logic Supply Input. Connect to the digital logic power supply, V
10nF capacitor as close as possible to the pin.
Digital Attenuator SPI or Parallel Control Selection Logic Input. Logic 0 = parallel control,
Logic 1 = serial control.
Digital Attenuator Preprogrammed Attenuation State Logic Input
State A
Logic = 0
Logic = 1
Logic = 0
Logic = 1
16dB Attenuator Logic Input. Logic 0 = disable, Logic 1 = enable.
8dB Attenuator Logic Input. Logic 0 = disable, Logic 1 = enable.
4dB Attenuator Logic Input. Logic 0 = disable, Logic 1 = enable.
2dB Attenuator Logic Input. Logic 0 = disable, Logic 1 = enable.
1dB Attenuator Logic Input. Logic 0 = disable, Logic 1 = enable.
Driver Amplifier Output (50Ω). See the Typical Application Circuit for details.
Driver Amplifier Bias Setting. See the External Bias section.
Driver Amplifier Input (50Ω). See the Typical Application Circuit for details.
Driver Amplifier Supply Voltage Input. Connect to the V
1000pF and 10nF capacitors as close as possible to the pin with the smaller value capacitor
closer to the part.
5-Bit Digital Attenuator Output (50Ω). Internally matched to 50Ω. Requires an external DC
blocking capacitor.
5-Bit Digital Attenuator Input (50Ω). Internally matched to 50Ω. Requires an external DC blocking
capacitor.
E xp osed P ad . Inter nal l y connected to GN D . C onnect E P to GN D for p r op er RF p er for m ance and
enhanced ther m al d i ssi p ati on.
50MHz to 1000MHz High-Linearity,
State B
Logic = 0
Logic = 0
Logic = 1
Logic = 1
Digital Attenuator
Preprogrammed State 1
Preprogrammed State 2
Preprogrammed State 3
Preprogrammed State 4
DESCRIPTION
CC
power supply. Bypass to GND with
DD
Pin Description
. Bypass to GND with a
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