MAX3750 Maxim, MAX3750 Datasheet - Page 4
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MAX3750
Manufacturer Part Number
MAX3750
Description
+3.3V / 2.125Gbps/1.0625Gbps Fibre Channel Port Bypass ICs
Manufacturer
Maxim
Datasheet
1.MAX3750.pdf
(6 pages)
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+3.3V, 2.125Gbps/1.0625Gbps
Fibre Channel Port Bypass ICs
A simplified block diagram of the single port bypass is
shown in Figure 1. IN+ and IN- drive an input buffer
(INBUFF) with 150
nation. INBUFF drives an output buffer (LOBUFF) and
an input to a multiplexer (MUX).
A low TTL input at SEL selects the signal path of
INBUFF through MUX to the output buffer (OUTBUFF).
When SEL has a high TTL logic level present the signal
path is into LIBUFF, through MUX, to OUTBUFF.
The low-frequency cutoff is determined by the input
resistance and the coupling capacitor as illustrated by
the following equation:
In a typical system where R = 150Ω and C = 100nF,
resulting in f
Figure 1. MAX3750/MAX3751 Block Diagram
4
_________________Circuit Description
_______________________________________________________________________________________
NOTE: SEE INTERNAL INPUT/OUTPUT SCHEMATICS FOR DETAILED TERMINATIONS (FIGURES 2–5).
C
= 10kHz.
f
C
of internal differential input termi-
= 1 / (2 RC)
IN+
IN-
Low-Frequency Cutoff
MAX3750
MAX3751
INBUFF
LOBUFF
The MAX3750/MAX3751 are high-frequency products.
The performance of the circuit is largely dependent
upon layout of the circuit board. Use a multilayer circuit
board with dedicated ground and V
supplies should be capacitively bypassed to the
ground plane with surface-mount capacitors placed
near the power-supply pins.
TTLIN
LIBUFF
D0
D1
MUX
SEL
SEL
Q
OUTBUFF
OUT+
OUT-
GND
V
Layout Techniques
CC
CC
planes. Power