MAX3882A Maxim Integrated Products, MAX3882A Datasheet - Page 4
![no-image](/images/manufacturer_photos/0/4/417/maxim_integrated_products_sml.jpg)
MAX3882A
Manufacturer Part Number
MAX3882A
Description
2.488Gbps 1:4 Demultiplexer
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX3882A.pdf
(13 pages)
www.DataSheet4U.com
2.488Gbps 1:4 Demultiplexer with Clock and
Data Recovery and Limiting Amplifier
AC ELECTRICAL CHARACTERISTICS (continued)
(V
Note 3: AC characteristics are guaranteed by design and characterization.
Note 4: Jitter tolerance is guaranteed (BER ≤ 10
Note 5: Measured with the input amplitude set at 100mV
Note 6: Measured with 10mV
Note 7: Measured at OC-48 data rate using a 0.068µF loop-filter capacitor.
Note 8: Under LOL condition, the CDR clock output is set by the external reference clock.
Note 9: Relative to the falling edge of PCLK+. See Figure 3.
4
Reference Clock Frequency
Reference Clock Accuracy
VCO Frequency Drift
Data Output Rate
Clock Output Frequency
Output Clock-to-Data Delay
Clock Output Duty Cycle
Clock and Data Output Rise/Fall
Time
LVDS Differential Skew
LVDS Channel-to-Channel Skew
CC
_______________________________________________________________________________________
= +3.0 to +3.6V, T
connected to V
(4th-order Bessel filter with f
PARAMETER
A
CC
= -40°C to +85°C. Typical values are at +3.3V and at T
.
P-P
OC-48 differential input with PRBS 2
3dB
SYMBOL
t
t
SKEW1
SKEW2
t
t
CK-Q
R
= 1.8GHz).
, t
F
-10
FREFSET = V
FREFSET = GND
(Note 8)
(Note 9)
20% to 80%
Any differential pair
PD_±
) within this input voltage range. Input threshold adjust is disabled when V
P-P
differential swing with a 20mV offset and an input edge speed of 145ps
CC
CONDITIONS
23
- 1 and BW = 12kHz to 20MHz.
A
= +25°C, unless otherwise noted.) (Note 3)
MIN
100
-80
45
±100
TYP
400
622
622
155
622
50
MAX
+80
250
100
55
50
UNITS
Mbps
CTRL
MHz
ppm
ppm
MHz
ps
ps
ps
ps
%
is