MAX503 Maxim, MAX503 Datasheet - Page 10

• Manufacturer Part Number: MAX503
• Description: 5V / Low-Power / Parallel-Input / Voltage-Output / 10-Bit DAC
• Manufacturer: Maxim

5V, Low-Power, Parallel-Input,
Voltage-Output, 10-Bit DAC
Figure 3. Low-Current Shutdown Mode
Table 2. Input Latch Addressing
10
CLR CS WR LDAC
H
H
H
H
H
H
H
H
L
______________________________________________________________________________________
X
H
X
H
L
L
L
L
L
2N7002
CLR
H
H
X
X
L
L
L
L
L
33 F
H
H
H
H
H
X
L
X
L
A0
REFGND
X
X
X
H
H
X
H
L
L
LDAC
WR
AGND
DGND
CS
A0
A1
CLR
A1
H
H
H
X
X
X
L
X
L
Reset DAC latches
No operation
No operation
NBH (D6–D9)
NBM (D2–D5)
NBL (S0 = 0, S1 = 0,
D0, D1)
Update DAC only
NBL and NBM (S0, S1,
D0–D5), DAC not
updated
NBH and update DAC
POWER-ON
DATA UPDATED
CONTROL
RESET
LOGIC
REFERENCE
2.048V
D6/S0
REFOUT
MAX503
D7/S1
LATCH
INPUT
NBL
D8/D0
An additional 110µA of supply current can be saved
when the internal reference is not used by connecting
REFGND to V
such as the 2N7002, can be used to turn off the internal
reference to create a shutdown mode with minimum
current drain (Figure 3). When CLR is high, the transis-
tor pulls REFGND to AGND and the reference and DAC
operate normally. When CLR goes low, REFGND is
pulled up to V
same time, CLR resets the DAC register to all 0s, and
the op-amp output goes to 0V for unity-gain and
G = 2 modes. This reduces the total single-supply
operating current from 250µA (400µA max) to typically
40µA in shutdown mode.
D9/D1
10-BIT DAC LATCH
D2
REFIN
DAC
LATCH
INPUT
D3
NBM
D4
D5
DD
DD
ROFS
. A low on-resistance N-channel FET,
and the reference is shut down. At the
LATCH
INPUT
NBH
V
RFB
V
DD
SS
+5V
V
OUT