MAX5250 Maxim, MAX5250 Datasheet - Page 11

• Manufacturer Part Number: MAX5250
• Description: Low-Power / Quad / 10-Bit Voltage-Output DAC with Serial Interface
• Manufacturer: Maxim

Figure 5. Serial-Interface Timing Diagram
Figure 6. Detailed Serial-Interface Timing Diagram
The power-down lockout pin PDL disables software
shutdown when low. When in shutdown, transitioning
PDL from high to low wakes up the part with the output
set to the state prior to shutdown. PDL can also be
used to wake up the device asynchronously.
Any number of MAX5250s can be daisy chained by
connecting the DOUT pin of one device to the DIN pin
of the following device in the chain (Figure 7).
DOUT
SCLK
Low-Power, Quad, 10-Bit Voltage-Output DAC
DIN
CS
(MODE 0)
(MODE 1)
DOUT
SCLK
DOUT
DIN
CS
t
CSO
______________________________________________________________________________________
A1
A1
A1
t
CSS
Daisy Chaining Devices
t
1
MSB FROM
PREVIOUS WRITE
DS
MSB FROM
PREVIOUS WRITE
A0
t
A0
A0
DH
C1
Power-Down (PDL)
C1
C1
C0
C0
C0
D9
t
CL
D9
D9
D8
D8
D8
D7
t
CH
D7
D7
DATA PACKET (N-1)
DATA PACKET (N-1)
DATA PACKET (N)
D6
D6
D6
8
D5
D5
D5
9
Since the MAX5250’s DOUT pin has an internal active
pull-up, the DOUT sink/source capability determines
the time required to discharge/charge a capacitive
load. Refer to the serial-data-out V
cations in the Electrical Characteristics.
Figure 8 shows an alternate method of connecting sev-
eral MAX5250s. In this configuration, the data bus is
common to all devices; data is not shifted through a
daisy chain. More I/O lines are required in this configu-
ration because a dedicated chip-select input (CS) is
required for each IC.
D4
D4
D4
D3
with Serial Interface
D3
D3
t
DO1
D2
D2
D2
t
D1
CP
t
DO2
D1
D1
D0
D0
D0
S1
S1
S1
S0
S0
S0
t
CSH
16
A1
A1
DATA PACKET (N)
DATA PACKET (N)
COMMAND
EXECUTED
t
CS1
OH
t
CSW
and V
OL
specifi-
11