MAX6746 Maxim, MAX6746 Datasheet - Page 7

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MAX6746

Manufacturer Part Number
MAX6746
Description
UP Reset Circuits with Capacitor-Adjustable Reset/Watchdog Timeout Delay
Manufacturer
Maxim
Datasheet

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The MAX6746–MAX6753 assert a reset signal whenever
the V
threshold. The reset output remains asserted for the
reset timeout period after V
its respective reset threshold. A watchdog timer triggers
a reset pulse whenever a watchdog fault occurs.
The reset and watchdog delays are adjustable with
external capacitors. The MAX6746–MAX6751 contain a
watchdog select input that extends the watchdog time-
out period to 128x.
The MAX6752 and MAX6753 have a sophisticated
watchdog timer that detects when the processor is run-
ning outside an expected window of operation. The
watchdog signals a fault when the input pulses arrive too
early (faster that the selected t
late (slower than the selected t
Figure 1).
The reset output is typically connected to the reset input
of a µP. A µP’s reset input starts or restarts the µP in a
known state. The MAX6746–MAX6753 µP supervisory
circuits provide the reset logic to prevent code-execu-
tion errors during power-up, power-down, and
brownout conditions (see theTypical Operating Circuit).
RESET changes from high to low whenever the moni-
tored voltage, RESET IN and/or V
reset threshold voltages. Once V
exceeds its respective reset threshold voltage(s),
RESET remains low for the reset timeout period, then
goes high.
Figure 1. MAX6752/MAX6753 Detailed Watchdog Input Timing Relationship
CC
supply voltage or RESET IN falls below its reset
µP Reset Circuits with Capacitor-Adjustable
_______________________________________________________________________________________
Detailed Description
WDI CONDITION 1
WDI CONDITION 2
WDI CONDITION 3
CC
GUARANTEED
TO ASSERT
RESET
WD1
and RESET IN rise above
WD2
*UNDETERMINED STATES MAY OR MAY NOT GENERATE A FAULT CONDITION
RESET IN
timeout period) or too
timeout period) (see
CC
Reset Output
drop below the
Reset/Watchdog Timeout Delay
and/or V
t
WD1
*UNDETERMINED
(MIN) t
WD1
CC
GUARANTEED TO
(MAX)
NOT ASSERT
RESET
RESET is guaranteed to be in the correct logic state for
V
reset logic when V
Ensuring a Valid RESET Output Down to V
The MAX6748–MAX6751 monitor the voltage on RESET IN
using an adjustable reset threshold (V
an external resistor voltage-divider
following formula to calculate the externally monitored
voltage (V
Figure 2. Calculating the Monitored Threshold Voltage
(V
CC
t
MON_TH
WD2
*UNDETERMINED
greater than 1V. For applications requiring valid
(MIN) t
R1
R2
V
MON_TH
V
)
MON_TH
MON_TH
WD2
RESET IN
GND
(MAX)
GUARANTEED TO
ASSERT
RESET
):
= V
MAX6748
MAX6749
MAX6750
MAX6751
CC
FAST FAULT
NORMAL OPERATION
SLOW FAULT
RESET IN
is less than 1V, see the section
V
CC
RESET IN Threshold
x (R1 + R2) / R2
V
MON_TH
V
CC
(Figure
= 1.235 x (R1 + R2) / R2
RESET IN
CC
2). Use the
= 0V.
) set with
7

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