MAX887 Maxim, MAX887 Datasheet - Page 7

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MAX887

Manufacturer Part Number
MAX887
Description
100% Duty Cycle / Low-Noise / Step-Down / PWM DC-DC Converter
Manufacturer
Maxim
Datasheet

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Figure 1. Simplified Functional Block Diagram
______________________________________________________________Pin Description
SHDN
SYNC
PIN
REF
VL
FB
1
2
3
4
5
6
7
8
NAME
SHDN
SYNC
GND
REF
V+
RAMP
FB
VL
LX
SYNC
REF
GEN
CELL
GND
REF
PWM
_______________________________________________________________________________________
Shutdown, Active-Low, Logic-Level Input. Connect SHDN to V+ for normal operation.
Feedback Input. Connect FB to a resistor voltage divider between the output and GND.
Reference Bypass Output. Connect a 0.047µF capacitor to GND very close to the MAX887, within 0.2 in. (5mm).
3.3V Internal Logic Regulator Output. Bypass VL to GND with a 2.2µF capacitor very close to the MAX887,
within 0.2 in. (5mm).
Ground
Oscillator Synchronization and PWM Control Input. SYNC is a logic-level input. Tie SYNC to VL for internal
300kHz PWM operation at all loads. The oscillator synchronizes to the negative edge of an external clock
between 10kHz and 400kHz. The MAX887 operates in PWM mode when SYNC is clocked. Tying SYNC to
GND allows a reduced supply-current mode at light loads.
Inductor Connection to the drain of an internal P-channel MOSFET
Supply-Voltage Input. 3.5V min to 11V max. Bypass V+ to GND with a 0.33µF and large-value electrolytic
capacitor in parallel. These capacitors must be as close to the V+ and GND pins as possible. Place the
0.33µF capacitor within 0.2 in. (5mm) of the MAX887.
SLOPE COMPENSATION
FROM CONTROL LOGIC
GND
V+
VL
PFM
COMPARATOR
Step-Down, PWM DC-DC Converter
PWM ON
100mV
25mV
SIGNAL
REF
FB
100% Duty Cycle, Low-Noise,
REF
FB
PFM CURRENT COMPARATOR
ILIM COMPARATOR
50mV
PWM
COMPARATOR
OVERVOLTAGE
COMPARATOR
FUNCTION
NEGLIM
COMPARATOR
DRIVER LOGIC
CONTROL &
SHIFTER
LEVEL
0mV in PFM
ADJ. IN PWM
0.1X
0.1X
SENSE FET
SENSE FET
1
1
V+
LX
GND
7

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