16C62P Renesas Technology / Hitachi Semiconductor, 16C62P Datasheet - Page 90
16C62P
Manufacturer Part Number
16C62P
Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
1.16C62P.pdf
(101 pages)
- Current page: 90 of 101
- Download datasheet (2Mb)
M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ03B0001-0241
Timing Requirements
(V
specified)
CC1
Table 5.60
Table 5.61
Table 5.62
Table 5.63
Table 5.64
Table 5.65
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
c(TA)
w(TAH)
w(TAL)
c(TA)
w(TAH)
w(TAL)
c(TA)
w(TAH)
w(TAL)
w(TAH)
w(TAL)
c(UP)
w(UPH)
w(UPL)
su(UP-TIN)
h(TIN-UP)
c(TA)
su(TAIN-TAOUT)
su(TAOUT-TAIN)
Symbol
Symbol
Symbol
Symbol
Symbol
= V
Symbol
CC2
Jan 10, 2006
= 5V, V
TAiIN Input Cycle Time
TAiIN Input HIGH Pulse Width
TAiIN Input LOW Pulse Width
TAiIN Input Cycle Time
TAiIN Input HIGH Pulse Width
TAiIN Input LOW Pulse Width
TAiIN Input Cycle Time
TAiIN Input HIGH Pulse Width
TAiIN Input LOW Pulse Width
TAiIN Input HIGH Pulse Width
TAiIN Input LOW Pulse Width
TAiOUT Input Cycle Time
TAiOUT Input HIGH Pulse Width
TAiOUT Input LOW Pulse Width
TAiOUT Input Setup Time
TAiOUT Input Hold Time
TAiIN Input Cycle Time
TAiOUT Input Setup Time
TAiIN Input Setup Time
Timer A Input (Counter Input in Event Counter Mode)
Timer A Input (Gating Input in Timer Mode)
Timer A Input (External Trigger Input in One-shot Timer Mode)
Timer A Input (External Trigger Input in Pulse Width Modulation Mode)
Timer A Input (Counter Increment/Decrement Input in Event Counter Mode)
Timer A Input (Two-phase Pulse Input in Event Counter Mode)
SS
= 0V, at T
Page 90 of 96
opr
= −40 to 85°C (T version) / −40 to 125°C (V version) unless otherwise
Parameter
Parameter
Parameter
Parameter
Parameter
Parameter
2000
1000
1000
Min.
Min.
Min.
Min.
Min.
Min.
100
400
200
200
200
100
100
100
100
400
400
800
200
200
40
40
V
Standard
Standard
Standard
Standard
Standard
Standard
CC1
5. Electrical Characteristics
Max.
Max.
Max.
Max.
Max.
Max.
=V
CC2
Unit
Unit
Unit
Unit
Unit
Unit
=5V
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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