ADS7807 Burr-Brown Corporation, ADS7807 Datasheet - Page 4

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ADS7807

Manufacturer Part Number
ADS7807
Description
Low-Power 16-Bit Sampling CMOS ANALOG-to-DIGITAL CONVERTER
Manufacturer
Burr-Brown Corporation
Datasheet

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TABLE I. Pin Assignments.
PIN CONFIGURATION
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN
assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject
to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not
authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
PIN #
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1
2
3
4
5
6
7
8
9
DATACLK
EXT/INT
SB/BTC
AGND1
AGND2
SDATA
PWRD
NAME
DGND
BYTE
BUSY
REFD
V
R1
R2
CAP
REF
TAG
V
R/C
EXT/INT
D7
D6
D5
D4
D3
D2
D1
D0
CS
SB/BTC
ANA
AGND1
AGND2
DIG
DGND
IN
IN
®
CAP
R1
R2
REF
D7
D6
D5
D4
D3
IN
IN
ADS7807
DIGITAL
10
11
12
13
14
1
2
3
4
5
6
7
8
9
I/O
I/O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
ADS7807
DESCRIPTION
Analog Input. See Figure 7.
Analog Sense Ground.
Analog Input. See Figure 7.
Reference Buffer Output. 2.2 F tantalum capacitor to ground.
Reference Input/Output. 2.2 F tantalum capacitor to ground.
Analog Ground.
Selects Straight Binary or Binary Two’s Complement for Output Data Format.
External/Internal data clock select.
Data Bit 7 if BYTE is HIGH. Data bit 15 (MSB) if BYTE is LOW. Hi-Z when CS is HIGH and/or R/C is LOW. Leave
unconnected when using serial output.
Data Bit 6 if BYTE is HIGH. Data bit 14 if BYTE is LOW. Hi-Z when CS is HIGH and/or R/C is LOW.
Data Bit 5 if BYTE is HIGH. Data bit 13 if BYTE is LOW. Hi-Z when CS is HIGH and/or R/C is LOW.
Data Bit 4 if BYTE is HIGH. Data bit 12 if BYTE is LOW. Hi-Z when CS is HIGH and/or R/C is LOW.
Data Bit 3 if BYTE is HIGH. Data bit 11 if BYTE is LOW. Hi-Z when CS is HIGH and/or R/C is LOW.
Digital Ground.
Data Bit 2 if BYTE is HIGH. Data bit 10 if BYTE is LOW. Hi-Z when CS is HIGH and/or R/C is LOW.
Data Bit 1 if BYTE is HIGH. Data bit 9 if BYTE is LOW. Hi-Z when CS is HIGH and/or R/C is LOW.
Data Bit 0 (LSB) if BYTE is HIGH. Data bit 8 if BYTE is LOW. Hi-Z when CS is HIGH and/or R/C is LOW.
Data Clock Output when EXT/INT is LOW. Data clock input when EXT/INT is HIGH.
Serial Output Synchronized to DATACLK.
Serial Input When Using an External Data Clock.
Selects 8 most significant bits (LOW) or 8 least significant bits (HIGH) on parallel output pins.
With CS LOW and BUSY HIGH, a Falling Edge on R/C Initiates a New Conversion. With CS LOW, a rising edge on R/C
enables the parallel output.
Internally OR’d with R/C. If R/C is LOW, a falling edge on CS initiates a new conversion. If EXT/INT is LOW, this same
falling edge will start the transmission of serial data results from the previous conversion.
At the start of a conversion, BUSY goes LOW and stays LOW until the conversion is completed and the digital outputs
have been updated.
PWRD HIGH shuts down all analog circuitry except the reference. Digital circuitry remains active.
REFD HIGH shuts down the internal reference. External reference will be required for conversions.
Analog Supply. Nominally +5V. Decouple with 0.1 F ceramic and 10 F tantalum capacitors.
Digital Supply. Nominally +5V. Connect directly to pin 27. Must be
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
V
REFD
PWRD
BUSY
CS
R/C
BYTE
TAG
SDATA
DATACLK
D0
D1
D2
DIG
ANA
4
TABLE II. Input Range Connections. See also Figure 7.
ANALOG
0V to 5V
0V to 4V
RANGE
INPUT
10V
CONNECT R1
VIA 200
V
AGND
ANA
TO
V
V
IN
IN
.
IN
CONNECT R2
VIA 100
CAP
TO
V
V
IN
IN
IN
IMPEDANCE
45.7k
20.0k
21.4k

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