ADS7832 Burr-Brown Corporation, ADS7832 Datasheet - Page 13

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ADS7832

Manufacturer Part Number
ADS7832
Description
Autocalibrating/ 4-Channel/ 12-Bit ANALOG-TO-DIGITAL CONVERTER
Manufacturer
Burr-Brown Corporation
Datasheet

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FIGURE 8. Measuring Active LOW to/from Hi-Z State.
As long as there is at least a 4.5V difference between V
and V
significantly, so that accuracy will typically be within 1LSB
The power supply to the reference source needs to be
considered during system design to prevent V
exceeding (or overshooting) V
Also, after power-on, if the reference is not stable within
33,056 clock cycles, an additional calibration cycle may be
needed.
POWER SUPPLIES
The digital and analog power supply lines to the ADS7832
should be bypassed with 10 F tantalum capacitors as close
to the part as possible. Although ADS7832 has excellent
power supply rejection, even for higher frequencies, linear
regulated power supplies are recommended.
Care should be taken to insure that V
before V
Figure 11 shows a good supply approach, powering both V
and V
between V
D
REF
Enable
Enable
Output
Output
from a clean linear supply, with the 10
A
–, the absolute value of errors does not change
, or permanent damage to the part may occur.
A
Gnd
Gnd
V
V
and V
V
V
V
V
OL
OL
ADS7832
D
D
D
D
Output
(c) From Hi-Z to LOW, C
90%
(b) From LOW to Hi-Z, C
D
50%
10%
insuring that V
t
FALL
(a) Load Circuit
t
RISE
t
5V
10%
15
50%
t
14
A
90%
3k
C
, particularly at power-on.
t
L
13
L
10%
L
D
= 100pF
= 10pF
Point
D
Test
comes up after V
does not come up
0.8V
REF
+ from
resistor
REF
A
+
A
.
13
FIGURE 9. Measuring Active HIGH to/from Hi-Z State.
This is also a good method to further isolate the ADS7832
from digital supplies in a system with significant switching
currents that could degrade the accuracy of conversions.
GROUNDING
To maximize accuracy of the ADS7832, the analog and
digital grounds are not connected internally. These points
should have very low impedance to avoid digital noise
feeding back into the analog ground. The V
as the reference point for input signals, so it should be
connected directly to AGND to reduce potential noise prob-
lems.
EXTERNAL CLOCK OPERATION
The circuitry required to drive the ADS7832 clock from an
external source is shown in Figure 12a. The external clock
must provide a 0.8V max for LOW and a 3.5V min for
HIGH, with rise and fall times that do not exceed 200ns. The
duty cycle of the external clock can vary as long as the LOW
time and HIGH time are each at least 200ns wide. Synchro-
nizing the conversion clock to an external system clock is
Enable
Enable
Output
Output
ADS7832
Gnd
Gnd
Gnd
Gnd
V
V
Output
V
V
OH
OH
D
D
(b) From HIGH to Hi-Z, C
(c) From Hi-Z to HIGH, C
3k
90%
10%
(a) Load Circuit
50%
t
FALL
t
RISE
ADS7832
50%
10%
t
90%
15
t
t
14
13
C
L
L
= 10pF
L
= 100pF
Point
90%
Test
2.4V
REF
– pin is used
®

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