STK14C88 Simtek, STK14C88 Datasheet - Page 4

• Manufacturer Part Number: STK14C88
• Description: 32Kx8 AutoStore nvSRAM
• Manufacturer: Simtek

STK14C88
Document Control #ML0014 Rev 0.3
SRAM READ CYCLES #1 & #2
Note g: W and HSB must be high during SRAM READ cycles and low during SRAM WRITE cycles.
Note h: I/O state assumes E and G <
Note i:
SRAM READ CYCLE #1: Address Controlled
SRAM READ CYCLE #2: E Controlled
DQ (DATA OUT)
DQ (DATA OUT)
NO.
10
11
1
2
3
4
5
6
7
8
9
ADDRESS
ADDRESS
February, 2007
Measured ± 200mV from steady state output voltage.
t
t
t
t
t
t
t
t
t
t
t
#1, #2
ELQV
AVAV
AVQV
GLQV
AXQX
ELQX
EHQZ
GLQX
GHQZ
ELICCH
EHICCL
I
SYMBOLS
CC
G
g
E
h
h
i
i
f
f
Alt.
t
t
t
t
t
t
t
t
t
t
t
ACS
RC
AA
OE
OH
LZ
HZ
OLZ
OHZ
PA
PS
Chip Enable Access Time
Read Cycle Time
Address Access Time
Output Enable to Data Valid
Output Hold after Address Change
Chip Enable to Output Active
Chip Disable to Output Inactive
Output Enable to Output Active
Output Disable to Output Inactive
Chip Enable to Power Active
Chip Disable to Power Standby
V
IL
STANDBY
and
t
ELICCH
W >
t
ELQX
10
t
6
t
AXQX
GLQX
V
5
8
IH
; device is continuously selected.
PARAMETER
t
GLQV
4
t
t
AVAV
g
ELQV
2
1
ACTIVE
t
AVQV
3
t
4
AVAV
2
g, h
STK14C88-25
DATA VALID
MIN
25
5
5
0
0
MAX
25
25
10
10
10
25
DATA VALID
STK14C88-35
MIN
35
5
5
0
0
(V
t
GHQZ
9
MAX
CC
35
35
15
13
13
35
t
EHQZ
7
t
= 5.0V ± 10%)
EHICCL
11
STK14C88-45
MIN
45
5
5
0
0
MAX
45
45
20
15
15
45
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
e