STK14C88-3 Simtek, STK14C88-3 Datasheet - Page 12

• Manufacturer Part Number: STK14C88-3
• Description: 32Kx8 AutoStore nvSRAM
• Manufacturer: Simtek

STK14C88-3
Document Control #ML0015 Rev 0.6
parts can be tied together and share a single capac-
itor. The capacitor size must be scaled by the num-
ber of devices connected to it. When any one of the
STK14C88-3s detects a power loss and asserts
HSB, the common HSB pin will cause all parts to
request a
those STK14C88-3s that have been written since
the last nonvolatile cycle).
During any
was initiated, the STK14C88-3 will continue to drive
the HSB pin low, releasing it only when the
complete. Upon completion of the
the STK14C88-3 will remain disabled until the HSB
pin returns high.
If HSB is not used, it should be left unconnected.
PREVENTING STORES
The
holding HSB high with a driver capable of sourcing
30mA at a V
overpower the internal pull-down device that drives
HSB low for 20μs at the onset of a
the STK14C88-3 is connected for AutoStore opera-
tion (system V
capacitor on V
way down, the STK14C88-3 will attempt to pull HSB
low; if HSB doesn’t actually get below V
will stop trying to pull HSB low and abort the
attempt.
HARDWARE PROTECT
The STK14C88-3 offers hardware protection against
inadvertent
ing low-voltage conditions. When V
externally initiated
WRITE
LOW AVERAGE ACTIVE POWER
The STK14C88-3 draws significantly less current
when it is cycled at times longer than 50ns. Figure 5
shows the relationship between I
time. Worst-case current consumption is shown for
both
perature range, V
enable). Figure 6 shows the same relationship for
WRITE
STORE
February 2007
CMOS
s will be inhibited.
cycles.
STORE
STORE
STORE
and
function can be disabled on the fly by
OH
CAP
CC
of at least 2.2V, as it will have to
TTL
CC
) and V
cycle (a
connected to V
operation and
= 3.6V, 100% duty cycle on chip
operation, regardless of how it
STORE
input levels (commercial tem-
CC
STORE
crosses V
operations and
CC
SRAM WRITE
will take place in
STORE
CCX
CAP
and
STORE
SWITCH
and a 68μF
< V
READ
IL
operation
, the part
STORE
SWITCH
. When
STORE
on the
SRAM
s dur-
cycle
, all
is
12
If the chip enable duty cycle is less than 100%, only
standby current is drawn when the chip is disabled.
The
STK14C88-3 depends on the following items: 1)
CMOS
enable; 3) the overall cycle rate for accesses; 4) the
ratio of
ture; 6) the V
100
100
overall
80
60
40
20
vs.
0
80
60
40
20
READ
0
TTL
cc
s to
Figure 5: I
Figure 6: I
input levels; 2) the duty cycle of chip
average
level; and 7) I/O loading.
50
50
WRITE
Cycle Time (ns)
Cycle Time (ns)
100
cc
cc
100
s; 5) the operating tempera-
current
(max) Reads
(max) Writes
150
150
TTL
TTL
CMOS
CMOS
drawn
200
200
by
the