STK14C88-M Simtek, STK14C88-M Datasheet

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STK14C88-M

Manufacturer Part Number
STK14C88-M
Description
32K x 8 AUTOSTORE nvSRAM QUANTUM TRAP CMOS NONVOLATILE STATIC RAM
Manufacturer
Simtek
Datasheet
FEATURES
• Nonvolatile Storage without Battery Problems
• 35ns and 45ns Access Times
• “Hands-off” Automatic STORE with External
• STORE to EEPROM Initiated by Hardware,
• RECALL to SRAM Initiated by Software or
• 10mA Typical I
• Unlimited READ, WRITE and RECALL Cycles
• 100,000 STORE Cycles to EEPROM
• 10-Year Data Retention in EEPROM
• Single 5V + 10% Operation
• Not Sensitive to Power On/Off Ramp Rates
• No Data Loss from Undershoot
• 32-Pad LCC and 32-Pin 300 mil CDIP Packages
BLOCK DIAGRAM
April 1999
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
A
A
A
A
A
A
A
A
A
68 F Capacitor on Power Down
Software or AutoStore ™ on Power Down
Power Restore
5
6
7
8
9
11
12
13
14
0
1
2
3
4
5
6
7
CC
at 200ns Cycle Time
A
COLUMN DEC
STATIC RAM
COLUMN I/O
0
512 x 512
A
ARRAY
1
A
2
A
3
EEPROM ARRAY
A
4
512 x 512
A
10
RECALL
STORE
32K x 8 AutoStore ™ nvSRAM
V
CCX
CONTROL
CONTROL
RECALL
POWER
STORE/
5-43
V
CAP
SOFTWARE
DETECT
DESCRIPTION
The Simtek STK14C88-M is a fast static
nonvolatile, electrically erasable
incorporated in each static memory cell. The
can be read and written an unlimited number of
times, while independent nonvolatile data resides in
EEPROM
EEPROM
matically on power down. A 68 F or larger capacitor
tied from V
operation, regardless of power-down slew rate or
loss of power from “hot swapping”. Transfers from
the
take place automatically on restoration of power. Ini-
tiation of
software controlled by entering specific read
sequences. A hardware
the HSB pin.
Nonvolatile Static RAM
QuantumTrap ™ CMOS
EEPROM
. Data transfers from the
(the
STORE
CAP
A
0
STORE
to the
HSB
G
E
W
- A
STK14C88-M
to ground guarantees the
13
and
PIN CONFIGURATIONS
PIN NAMES
operation) can take place auto-
SRAM
V
DQ
DQ
DQ
A
A
V
CAP
NC
14
12
A
A
A
A
A
A
A
A
SS
A
DQ
E
W
G
HSB
V
V
V
RECALL
7
6
5
4
3
2
1
0
0
1
2
0
CCX
CAP
SS
STORE
MIL-STD-883
- A
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
-DQ
14
(the
7
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
may be initiated with
cycles can also be
Address Inputs
Data In/Out
Chip Enable
Write Enable
Output Enable
Hardware Store Busy (I/O)
Power (+ 5V)
Capacitor
Ground
RECALL
V
HSB
W
A
A
A
A
G
NC
A
E
DQ
DQ
DQ
DQ
DQ
CCX
13
8
9
11
10
7
6
5
4
3
PROM
A
A
A
A
NC
A
A
A
DQ
6
5
4
3
2
1
0
0
SRAM
5
6
7
8
9
10
11
12
13
14
4
RAM
15
3
operation)
16
2
LCC
32
17
element
1
STORE
18
32
to the
with a
SRAM
31
19
30
20
29
28
27
26
25
24
23
22
21
A
A
A
A
G
NC
A
E
DQ
13
8
9
11
10
7

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STK14C88-M Summary of contents

Page 1

... STK14C88-M 32K x 8 AutoStore ™ nvSRAM QuantumTrap ™ CMOS Nonvolatile Static RAM DESCRIPTION The Simtek STK14C88 fast static nonvolatile, electrically erasable incorporated in each static memory cell. The can be read and written an unlimited number of times, while independent nonvolatile data resides in . Data transfers from the ...

Page 2

... STK14C88-M ABSOLUTE MAXIMUM RATINGS Voltage on Input Relative .–0. Voltage HSB . . . . . . . . . . . . . . . .–0. 0-7 Temperature under Bias – 125 C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . – 150 C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1W DC Output Current (1 output at a time, 1s duration 15mA DC CHARACTERISTICS SYMBOL PARAMETER b I Average V ...

Page 3

... April 1999 PARAMETER AVAV 3 t AVQV 5 t AXQX DATA VALID AVAV 1 t ELQV GLQV 8 t GLQX 10 t ELICCH ACTIVE 5-45 STK14C88 5.0V 10%) CC STK14C88-35M STK14C88-45M UNITS MIN MAX MIN MAX ...

Page 4

... STK14C88-M SRAM WRITE CYCLES #1 & #2 SYMBOLS NO Alt Write Cycle Time AVAV AVAV Write Pulse Width WLWH WLEH Chip Enable to End of Write ELWH ELEH Data Set-up to End of Write DVWH DVEH Data Hold after End of Write ...

Page 5

... HSB rises. Note n: The six consecutive addresses must be in order listed. W must be high during all six consecutive cycles to enable a nonvolatile cycle. Note o: While there are 15 addresses on the STK14C88-M, only the lower 14 are used to control software modes. Note p: I/O state assumes G < V ...

Page 6

... If an SRAM WRITE has not taken place since the last nonvolatile cycle, HSB SWITCH 29 t VSBL 30 t DELAY BROWN OUT AutoStore ™ NO RECALL DID NOT GO (V DID NOT BELOW V ) RESET RESET 5- 5.0V 10%) CC STK14C88-M UNITS NOTES MIN MAX 550 300 4.0 4 STORE BROWN OUT AutoStore ™ ...

Page 7

... AVEL ELEH ELAX DQ (DATA OUT) DATA VALID April 1999 v STK14C88-35M PARAMETER MIN MAX AVAV ADDRESS #6 DATA VALID 5-49 STK14C88 5.0V 10%) CC STK14C88-45M UNITS NOTES MIN MAX STORE ...

Page 8

... STK14C88-M The STK14C88-M has two separate modes of oper- ation: mode and nonvolatile mode. In SRAM mode, the memory operates as a standard fast static . In nonvolatile mode, data is transferred RAM from to (the SRAM EEPROM STORE from to (the RECALL EEPROM SRAM this mode functions are disabled. ...

Page 9

... READ WRITE operation in no way alters the data in the cells. The nonvolatile data can be recalled an unlim- ited number of times. AutoStore ™ OPERATION The STK14C88-M can be powered in one of three modes. During normal AutoStore ™ STK14C88-M will draw current from V capacitor connected to the V ...

Page 10

... STORE STK14C88-M is connected for AutoStore ™ opera- cycle will only tion (system V capacitor on V way down, the STK14C88-M will attempt to pull HSB low; if HSB doesn’t actually get below V (initiated STORE will stop trying to pull HSB low and abort the attempt. ...

Page 11

... TTL 20 CMOS 0 50 100 150 Cycle Time (ns) Figure 5: I (max) Reads CC April 1999 100 200 Figure 6: I 5-53 STK14C88-M TTL CMOS 50 100 150 200 Cycle Time (ns) (max) Writes CC ...

Page 12

... STK14C88-M STK14C88 - April 1999 ORDERING INFORMATION Temperature Range M =Military ( Access Time 35 = 35ns 45 = 45ns Package L = 32-Pad LCC C = Ceramic 32-Pin 300 mil CDIP K = Ceramic 32-Pin 300 mil CDIP 5- 125˚C) – with solder DIP finish ...

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