LPC2148 Philips, LPC2148 Datasheet - Page 22

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LPC2148

Manufacturer Part Number
LPC2148
Description
16/32 Bit Microcontroller
Manufacturer
Philips
Datasheet

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Preliminary data sheet
6.19.1 Features
6.20.1 Features
6.19 Watchdog timer
6.20 Real-time clock
The purpose of the watchdog is to reset the microcontroller within a reasonable amount of
time if it enters an erroneous state. When enabled, the watchdog will generate a system
reset if the user program fails to ‘feed’ (or reload) the watchdog within a predetermined
amount of time.
The RTC is designed to provide a set of counters to measure time when normal or idle
operating mode is selected. The RTC has been designed to use little power, making it
suitable for battery powered systems where the CPU is not running continuously (Idle
mode).
External event counter or timer operation.
Four 32-bit capture channels per timer/counter that can take a snapshot of the timer
value when an input signal transitions. A capture event may also optionally generate
an interrupt.
Four 32-bit match registers that allow:
– Continuous operation with optional interrupt generation on match.
– Stop timer on match with optional interrupt generation.
– Reset timer on match with optional interrupt generation.
Four external outputs per timer/counter corresponding to match registers, with the
following capabilities:
– Set LOW on match.
– Set HIGH on match.
– Toggle on match.
– Do nothing on match.
Internally resets chip if not periodically reloaded.
Debug mode.
Enabled by software but requires a hardware reset or a watchdog reset/interrupt to be
disabled.
Incorrect/Incomplete feed sequence causes reset/interrupt if enabled.
Flag to indicate watchdog reset.
Programmable 32-bit timer with internal pre-scaler.
Selectable time period from (T
T
Measures the passage of time to maintain a calendar and clock.
Ultra-low power design to support battery powered systems.
PCLK
× 4.
Rev. 01 — 22 June 2005
PCLK
× 256 × 4) to (T
Single-chip 16/32-bit microcontrollers
PCLK
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
LPC2142/2148
× 2
32
× 4) in multiples of
22 of 40

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