MT1020A Zarlink Semiconductor, MT1020A Datasheet - Page 8

• Manufacturer Part Number: MT1020A
• Manufacturer: Zarlink Semiconductor

MT1020A
8
Memory/Peripheral Controller
The Memory/Peripheral Controller (MPC) is the main
gateway between the internal and external bus
systems. It allows dynamic bus sizing and generates
all control signals to access peripheral components.
The MPC also supports fly-by DMA between all
combinations of internal and external modes.
Serial I/0
The Serial (BSIO) I/0 block supports the serial
interface to a variety of external devices, such as
serial EEPROM, NVRAM and Flash. It is compatible
with two common interfaces:
•
•
The block operates in either Interrupt or Polled
modes also supports Fly-by DMA transfers.
Interrupt Controller (INTC)
The ARM7TDMI core accepts two types of interrupt:
Normal (IRQ) and Fast (FIQ). All Interrupts can be
switched between types, depending upon the
relative priorities required. The INTC is the central
control logic that decodes the priority level and
handles interrupt request signals from a total of 8
fixed predefined sources within the microcontroller
core and two external sources, Gpio<7:6>. External
interrupts can be set for edge or level sensitivity with
a polarity option. To minimize interrupt latency, there
is a hard-wired priority scheme for each channel for
both FIQ and IRQ; alternatively this can be ignored
and the priority assessment handled in software.
Timers
Two dual independent 32-bit timer/counters, with an
8-bit prescaler capability for each counter, are
provided (Timers 1A, 1B, 2A and 2B). These are
synchronous to the system clock and may be polled,
or set up to generate interrupts on over-run, with
auto-reload.
DMA Controller
Two DMA engines are available in the controller.
These may be configured as a pair to provide a
memory-to-memory DMA capability between any two
locations
Alternatively, they may be used independently for fly
by transfers between off-core requesters and either
on-core or off-core locations. Single or multiple byte
transfers (Demand or Burst Mode) are supported
and may be word, half-word or byte wide.
MICROWIRE™ for use with memory and
peripheral devices supporting the MICROWIRE
standard
SPI microcontroller serial interface
in
the
Preliminary Information
ARM7TDMI
memory
space.
Universal Asynchronous Receiver Transmitter
(UART1)
The full duplex asynchronous channel provides an
RS232 type interface, which supports both hardware
handshaking and XON/XOFF software protocols.
The Receive and Transmit channels are double
buffered. UART1 may be polled, or may use an
interrupt scheme for module bus transfers. An
internal baud rate generator can provide selectable
data rates, derived from on-chip sources for an Rx/
Tx pair. Directly triggered DMA transfers with the
UART are also possible without the need for CPU
intervention.
System Debug Options
The microcontroller core allows for two sophisticated
methods of hardware and software debug. The
designer should choose which methods are required.
The options are:
•
•
Baseband Protocol Stack
The MT1020A is supplied with the Zarlink baseband
protocol stack software. This stack, when used in
conjunction with the Bluetooth Baseband Peripheral
block, implements the Bluetooth Specification v1·1
up to the HCI layer. Features of the Stack include :
Link Controller
The Link Controller includes multi-point capability,
support for multi-slot packets, and Authentication
and Encryption.
Link Manager
Supports Park, Hold and Sniff modes for reduced
power consumption.
Host Controller Interface
Operates
(asynchronous) and SCO (synchronous) data types.
"BLUETOOTH" is a trademark owned by Bluetooth SIG, Inc., U.S.A. and
MICROWIRE is a registered trademark of National Semiconductor Corp.
ARM7TDMI™ Debug Interface, via the ARM
MultiICE™ module, or equivalent
Logic Analyser coupled with an Inverse
Assembler and Zarlink’s Diagnostic Broadcast
feature
ARM7TDMI and EmbeddedlCE are trademarks of ARM Limited.
Thumb is a registered trademark of ARM Limited.
a
licensed to Zarlink Semiconductor.
UART
interface,
supporting
ACL