LPC2888 Philips Semiconductors, LPC2888 Datasheet

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LPC2888

Manufacturer Part Number
LPC2888
Description
(LPC2880 / LPC2888) 16/32-bit ARM microcontrollers
Manufacturer
Philips Semiconductors
Datasheet

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1. General description
2. Features
2.1 Key features
The LPC2880/LPC2888 are an ARM7-based microcontroller for portable applications
requiring low power and high performance. It includes a USB 2.0 Hi-Speed device
interface, an external memory interface that can interface to SDRAM and flash, an
SD/MMC memory card interface, A/D and D/A converters, and serial interfaces including
UART, I
processor cache, simultaneous operations on multiple internal buses, and flexible clock
generation help ensure that the LPC2880/LPC2888 can handle more demanding
applications than many competing devices. The chip can be powered from a single
battery, from the USB, or from regulated 1.8 V and 3.3 V.
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LPC2880; LPC2888
16/32-bit ARM microcontrollers; 8 kB cache, up to 1 MB flash,
Hi-Speed USB 2.0 device, and SDRAM memory interface
Rev. 01 — 22 June 2006
ARM7TDMI processor with 8 kB cache, operating at up to 60 MHz
1 MB on-chip flash program memory with 128-bit access for high performance
64 kB SRAM
Boot ROM allows execution of flash code, external code, or flash programming via
USB
On-chip DC-to-DC converter can generate all required voltages from a single battery
or from USB power
Multiple internal buses allow simultaneous simple DMA, USB DMA, and program
execution from on-chip flash without contention
External memory controller supports flash, SRAM, ROM, and SDRAM
Advanced Vectored Interrupt Controller, supporting up to 30 vectored interrupts
Innovative Event Router allows interrupt, power-up, and clock-start capabilities from up
to 107 sources
Multi-channel GP DMA controller that can be used with most on-chip peripherals as
well as for memory-to-memory transfers
Serial interfaces:
SD/MMC memory card interface
10-bit A/D converter with 5-channel input multiplexing
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Hi-Speed USB 2.0 device (480 Mbit/s or 12 Mbit/s) with on-chip physical layer
UART with fractional baud rate generation, flow control, IrDA support, and FIFOs
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and output
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C-bus interface
S-bus (Inter IC Sound bus) interface for independent stereo digital audio input
C-bus, and I
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S-bus. Architectural enhancements like multi-channel DMA,
DataSheet4U.com
Preliminary data sheet
DataShee

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LPC2888 Summary of contents

Page 1

... SD/MMC memory card interface, A/D and D/A converters, and serial interfaces including UART, I processor cache, simultaneous operations on multiple internal buses, and flexible clock generation help ensure that the LPC2880/LPC2888 can handle more demanding applications than many competing devices. The chip can be powered from a single battery, from the USB, or from regulated 1.8 V and 3.3 V. ...

Page 2

... TFBGA180 plastic thin fine-pitch ball grid array package; 180 balls; body 10 Ordering options Flash memory - DataSheet4U.com 1 MB Rev. 01 — 22 June 2006 LPC2880; LPC2888 10 0 0.8 mm RAM Temperature range + +85 C © ...

Page 3

... AIN[4:0] CONVERTER V REF, AIN_LNA, AINA, AINB TRIPLE ANALOG AOUT_LNA DUAL ANALOG AOUTA, AOUTA_DAC, AOUTB, AOUTB_DAC (1) LPC2888 only. Fig 1. Block diagram LPC2880_LPC2888_1 Preliminary data sheet 16/32-bit ARM microcontrollers with external memory interface JTAG DEBUG INTERFACE 64 kB BOOT SRAM ROM ARM7TDMI-S SRAM ROM ...

Page 4

... D1/P0[ SS2(EMC) 10 MCLKO/P1[14] 14 A15/P0[31] 18 A6/P0[22] 2 D2/P0[2] 6 D11/P0[11] 10 CKE/P1[9] 14 A16/P1[0] 18 A7/P0[23] 2 LD0/P4[4] 6 D10/P0[10] 10 CAS/P1[16] 14 A17/P1[1] 18 A8/P0[24] 2 LD3/P4[7] Rev. 01 — 22 June 2006 LPC2880; LPC2888 LPC2880/ LPC2888 002aac239 Pin Symbol Pin 3 D3/P0[ DD2(EMC) 11 DQM1/P1[11 SS1(EMC LCS/P4[0] ...

Page 5

... MD1/P5[ DD4(IO3V3) 2 CTS/P6[ MODE1/P2[2] 2 VREFP(DAC) DD(DAC3V3 STOP 2 AOUTA_DAC DCDC_CLEAN BAT 2 AOUTRA DCDC_V DDO(1V8 SS2(AMP) SS1(AMP Rev. 01 — 22 June 2006 LPC2880; LPC2888 Pin Symbol Pin Symbol A3/P0[19 LD7/P4[11 A0/P0[16 LRS/P4[ DCLKO/P3[ MCLK/P5[ DATI/P3[0] - ...

Page 6

... ADC common reference voltage and analog output reference voltage combined on-chip ADC reference voltage ADC negative reference voltage ADC positive reference voltage 1.8 V for dual ADC 3.3 V for dual ADC ground for dual ADC Rev. 01 — 22 June 2006 LPC2880; LPC2888 Pin Symbol Pin Symbol - - 3 AIN_LNA ...

Page 7

... DC-to-DC main ground and substrate connect to external coil for DC/DC1 connect to external coil for DC/DC2 connect to battery + DC/DC1 3.3 V input voltage DC/DC2 1.8 V output voltage Rev. 01 — 22 June 2006 LPC2880; LPC2888 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. DataShee ...

Page 8

... GPIO pins external memory data bus, high byte (I/O); GPIO pins DataSheet4U.com address bus for SDRAM and static memory; GPIO pins Rev. 01 — 22 June 2006 LPC2880; LPC2888 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. DataShee ...

Page 9

... JTAG data input (pull-up tolerant pin JTAG mode select input (pull-up tolerant pin JTAG reset input (pull-down tolerant pin JTAG data output tolerant pin Rev. 01 — 22 June 2006 LPC2880; LPC2888 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. DataShee ...

Page 10

... LOW tolerant GPIO pin serial input tolerant GPIO pin request to send or receive flow control, active LOW tolerant GPIO pin serial output tolerant GPIO pin Rev. 01 — 22 June 2006 LPC2880; LPC2888 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. DataShee ...

Page 11

... Rev. 01 — 22 June 2006 LPC2880; LPC2888 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. DataShee ...

Page 12

... Philips Semiconductors 6. Functional description 6.1 Architectural overview The LPC2880/LPC2888 includes an ARM7TDMI CPU with cache, an AMBA AHB interfacing to high-speed on-chip peripherals and internal and external memory, and four AMBA APBs for connection to other on-chip peripheral functions. The LPC2880/LPC2888 includes a multi-layer AHB and four separate APBs, in order to minimize interference between the USB controller, other DMA operations, and processor activity ...

Page 13

... The flash is 128 bit wide and includes buffering to allow 3 out of 4 sequential read operations to operate without wait states. 6.1.3 On-chip static RAM The LPC2880/LPC2888 includes static RAM that may be used for code and/or data storage. 6.1.4 On-chip ROM The LPC2880/LPC2888 includes an on-chip ROM that contains boot code. Execution begins in on-chip ROM after a Reset ...

Page 14

... ROM (32 kB) exception vectors 0.0 GB Fig 3. Memory map LPC2880_LPC2888_1 Preliminary data sheet LPC2880; LPC2888 16/32-bit ARM microcontrollers with external memory interface 0x9000 0000 to 0xFFFF FFFF 0x8000 0000 to 0x8FFF FFFF 0x5400 0000 to 0x7FFF FFFF 0x5000 0000 to 0x53FF FFFF 0x4820 0000 to 0x4FFF FFFF ...

Page 15

... Flash memory and programming The LPC2888 incorporates 1 MB flash memory system, while the LPC2880 is a flash-less device. The flash memory of the LPC2888 may be used for both code and data storage. Programming of the flash memory may be accomplished in several ways. It may be programmed In System via the USB port. The application program may also erase and/or program the fl ...

Page 16

... Initial programming or reprogramming is can be accomplished from the USB port. 6.5 External memory controller The LPC2880/LPC2888 External Memory Controller (EMC multi-port memory controller that supports asynchronous static memory devices such as RAM, ROM and flash, as well as dynamic memories such as Single Data Rate SDRAM. It complies with ARM’ ...

Page 17

... Software interrupt capability for each source 6.8 Event router 105 external and internal LPC2880/LPC2888 signals are connected to the Event Router block. Most of them are device pins, plus a selection of internal signals from other LPC2880/LPC2888 modules. GPIO input pins, functional input pins, and even functional outputs can be monitored by the Event Router ...

Page 18

... The five outputs can be read in the Output Register. 6.9 General purpose timers The LPC2880/LPC2888 contains two fully independent general purpose timers. Each timer is a 32-bit wide down counter with selectable prescaler. The prescaler allows either the system clock to be used directly, or the clock to be divided 256. ...

Page 19

... Rotating channel priority. Each DMA channel has equal opportunity to perform transfers. • The GPDMA is one of three AHB masters in the LPC2880/LPC2888, the others being the ARM7 processor and the USB interface. • Incrementing or non-incrementing addressing for source and destination. • ...

Page 20

... IrDA mode for infrared communication. 2 6.14 I C-bus interface The LPC2880/LPC2888 I master Transmit mode, master Receive mode, slave Transmit mode and slave Receive mode. The interface complies with the entire I power off to the LPC2880/LPC2888 without causing a problem with other devices on the 2 same I 6.14.1 Features • Standard I • ...

Page 21

... Bulk transfers are used when rate of transfer is not critical. Isochronous transfers have guaranteed delivery time but no error correction. The LPC2880/LPC2888 USB controller enables 480 Mbit Mbit/s data exchange with a USB host controller. It includes a USB controller, a DMA engine, and a USB 2.0 ATX physical interface ...

Page 22

... Supports multiple frequencies for the bus, to support high and low speed LCD controllers. LPC2880_LPC2888_1 Preliminary data sheet LPC2880; LPC2888 16/32-bit ARM microcontrollers with external memory interface DataSheet4U.com Rev. 01 — 22 June 2006 © Koninklijke Philips Electronics N.V. 2006. All rights reserved ...

Page 23

... Lower speed peripherals are connected to an APB bus for lower power consumption. 6.20.2 Reset The LPC2880/LPC2888 has two sources of reset: the RESET_N pin and the watchdog reset. The RESET pin includes an on-chip pull-up. The RESET_N pin must remain asserted at power-up for 1 ms after power supply voltages are stable. This includes on-chip DC-to-DC converter voltages ...

Page 24

... Philips Semiconductors 6.20.4 PLLs The LPC2880/LPC2888 includes two PLLs: a low power PLL that may be used to provide clocks to most chip functions; a high-speed PLL that may be used to generate faster clocks for selected chip functions, if needed. Each PLL can be driven from several clock sources. These include the main oscillator (1 MHz to 20 MHz), the RTC oscillator (32 kHz), the bit clock or word select inputs of the I the SD/MMC Card interface, or the output clock from the other PLL ...

Page 25

... EmbeddedICE protocol converter. The EmbeddedICE protocol converter converts the Remote Debug Protocol commands to the JTAG data needed to access the ARM core. LPC2880_LPC2888_1 Preliminary data sheet LPC2880; LPC2888 16/32-bit ARM microcontrollers with external memory interface DataSheet4U.com Rev. 01 — 22 June 2006 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. ...

Page 26

... Per ground pin. [8] Human body model: equivalent to discharging a 100 pF capacitor through a 1.5 k series resistor. [9] Machine model: equivalent to discharging a 200 pF capacitor through a 0.75 H coil and a 10 LPC2880_LPC2888_1 Preliminary data sheet LPC2880; LPC2888 16/32-bit ARM microcontrollers with external memory interface [1] Conditions Min 0.5 0.5 in 1.8 V range ...

Page 27

... 1 1.8 V DD(EMC 3.3 V DD(EMC 1.2 V DCDC_VBAT oscillator running oscillator powered down oscillator running oscillator powered down normal powered down normal powered down Rev. 01 — 22 June 2006 LPC2880; LPC2888 [1] Min Typ [2] 1.7 1.8 [3] 3 3.3 [4] 3 3.3 [5] 1.7 1.8 [5] 2.7 3.3 0 ...

Page 28

... V DD2(CORE1V8) DD1(FLASH1V8) DD2(FLASH1V8 DD3(USB3V3) DD4(USB3V3) DD1(IO3V3 DD(DAC3V3) DD1(AMP3V3 DD1(EMC) DD2(EMC) for the pin DD2(CORE1V8) DD1(FLASH1V8) DD2(FLASH1V8) DataSheet4U.com . . Rev. 01 — 22 June 2006 LPC2880; LPC2888 Min Typ [18] - <tbd> [18] - <tbd> [19] - <tbd> [19] - <tbd> DD(OSC1V8) DD(OSC321V8) DD1(USB1V8 DD2(IO3V3) DD3(IO3V3) DD4(IO3V3) . ...

Page 29

... Parameters are valid over operating temperature range unless otherwise specified. [2] Supplied by an external crystal. LPC2880_LPC2888_1 Preliminary data sheet LPC2880; LPC2888 16/32-bit ARM microcontrollers with external memory interface [1] Conditions Min [ DataSheet4U.com Rev. 01 — 22 June 2006 ...

Page 30

... 10.1 10.1 8.5 8.5 0.5 0.1 9.9 9.9 REFERENCES JEDEC JEITA MO-195 Rev. 01 — 22 June 2006 LPC2880; LPC2888 detail 0.12 0.1 0.15 EUROPEAN PROJECTION © Koninklijke Philips Electronics N.V. 2006. All rights reserved. SOT640-1 DataShee ISSUE DATE ...

Page 31

... Phase-Locked Loop Reduced Instruction Set Computer Secure Digital/MultiMedia Card DataSheet4U.com Synchronous Dynamic Random Access Memory Static Random Access Memory Universal Asynchronous Receiver/Transmitter Universal Serial Bus Rev. 01 — 22 June 2006 LPC2880; LPC2888 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. DataShee ...

Page 32

... Philips Semiconductors 12. Revision history Table 9. Revision history Document ID Release date LPC2880_LPC2888_1 20060622 LPC2880_LPC2888_1 Preliminary data sheet LPC2880; LPC2888 16/32-bit ARM microcontrollers with external memory interface Data sheet status Change notice Preliminary data sheet - DataSheet4U.com Rev. 01 — 22 June 2006 Supersedes - © Koninklijke Philips Electronics N.V. 2006. All rights reserved. ...

Page 33

... Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners C-bus — logo is a trademark of Koninklijke Philips Electronics N.V. Rev. 01 — 22 June 2006 LPC2880; LPC2888 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. DataShee ...

Page 34

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © Koninklijke Philips Electronics N.V. 2006. For more information, please visit: http://www.semiconductors.philips.com. For sales office addresses, email to: sales.addresses@www.semiconductors.philips.com. All rights reserved. Date of release: 22 June 2006 Document identifier: LPC2880_LPC2888_1 ...

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