MT18D836 Micron Semiconductor Products, Inc., MT18D836 Datasheet - Page 2
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MT18D836
Manufacturer Part Number
MT18D836
Description
72-Pin DRAM Simms, Ecc Optimized, (x36), , Status: End of Life (EOL)
Manufacturer
Micron Semiconductor Products, Inc.
Datasheet
1.MT18D836.pdf
(9 pages)
NOT RECOMMENDED FOR NEW DESIGNS
PAGE MODE (continued)
RAS# HIGH terminates page mode operation, i.e., closes
the page.
REFRESH
memory cycle and decreases chip current to a reduced
standby level. Also, the chip is preconditioned for the
JEDEC-DEFINED
PRESENCE-DETECT – MT9D436 (16MB)
4, 8 Meg x 36 ECC-Optimized DRAM SIMMs
DM84_2.p65 – Rev. 9/98
SYMBOL
PRD1
PRD2
PRD3
PRD4
Returning RAS# and CAS# HIGH terminates a
PIN
67
68
69
70
Vss
NC
NC
NC
-6
2
next cycle during the RAS# HIGH time. Memory cell
data is retained in its correct state by maintaining
power and executing anyRAS# cycle (READ, WRITE) or
RAS# REFRESH cycle (RAS# ONLY, CBR or HIDDEN) so
that all 2,048 combinations of RAS# addresses are ex-
ecuted at least every 32ms, regardless of sequence.
The CBR REFRESH cycle will invoke the refresh counter
for automatic RAS# addressing.
JEDEC-DEFINED
PRESENCE-DETECT – MT18D836 (32MB)
SYMBOL
PRD1
PRD2
PRD3
PRD4
ECC-OPTIMIZED DRAM SIMMs
Micron Technology, Inc., reserves the right to change products or specifications without notice.
PIN
67
68
69
70
Vss
NC
NC
NC
-6
4, 8 MEG x 36
©1998, Micron Technology, Inc.