MT55L1MY18P Micron Semiconductor Products, Inc., MT55L1MY18P Datasheet - Page 20

• Manufacturer Part Number: MT55L1MY18P
• Description: 18Mb ZBT SRAM, 3.3V Vdd, 2.5V or 3.3V I/O; 2.5V Vdd, 2.5V I/O, Pipelined,
• Manufacturer: Micron Semiconductor Products, Inc.

NOTE:
18Mb: 1 Meg x 18, 512K x 32/36 Pipelined ZBT SRAM
MT55L1MY18P_16_D.fm – Rev. D, Pub. 2/03
1. The IGNORE CLOCK EDGE or STALL cycle (clock 3) illustrates CKE# being used to create a “pause.” A WRITE is not
2. For these waveforms, ZZ and OE# are tied LOW.
3. CE# represents three signals. When CE# = 0, it represents CE# = 0, CE2# = 0, CE2 = 1.
4. Data coherency is provided for all possible operations. If a READ is initiated, the most current data is used. The most
COMMAND
performed during this cycle.
recent data may be from the input data register.
ADDRESS
ADV/LD#
BWx#
R/W#
CKE#
CLK
CE#
DQ
WRITE
D(A1)
A1
1
Q(A2)
READ
A2
2
NOP, STALL, and DESELECT Cycles
STALL
3
D(A1)
Q(A3)
READ
A3
4
Figure 9:
Q(A2)
20
WRITE
D(A4)
A4
5
18Mb: 1 MEG x 18, 512K x 32/36
Micron Technology, Inc., reserves the right to change products or specifications without notice.
STALL
6
Q(A3)
NOP
7
PIPELINED ZBT SRAM
DON’T CARE
D(A4)
Q(A5)
READ
A5
8
DESELECT
9
©2003 Micron Technology, Inc.
t
KHQX
UNDEFINED
CONTINUE
DESELECT
Q(A5)
10
t
KHQZ