MT9122 Zarlink Semiconductor, MT9122 Datasheet - Page 17
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MT9122
Manufacturer Part Number
MT9122
Description
Dual Voice Echo CANceller (ITU-T G165 Compliant) With Disable Tone Detection
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT9122.pdf
(31 pages)
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Data Sheet
Register Summary
MuteR
MuteS
HPFDis
NBDis
AutoTD
NLPDis
PHDis
TDis
NB
TDG
Active
Down
Conv
DTDet
TD
Extended-
Delay
AdaptDis
Bypass
PAD
BBM
INJDis
Reset
Note: Bits marked as “1” or “0” are reserved bits and should be written as indicated.
Echo Canceller A, Status Register
Echo Canceller B, Status Register
SR
Echo Canceller A, Control Register 1
CRA1
Echo Canceller B, Control Register 1
CRB1
Echo Canceller A, Control Register 2
Echo Canceller B, Control Register 2
CR2
When high, data on Rout is muted to quiet code. When low, Rout carries active code.
When high, data on Sout is muted to quiet code. When low, Sout carries active code.
When high, the offset nulling high pass filters are bypassed in the Rin and Sin paths.
When high, the narrow-band detector is disabled. When low, the narrow-band detector is enabled.
When high, the echo canceller is in Bypass mode when the tone detectors detect the presence of 2100Hz tones. See PHDis
When high, the non-linear processor is disabled.
When high, the tone detectors will trigger upon the presence of a 2100Hz tone regardless of the presence/absence of periodic
When high, tone detection is disabled entirely. When low, tone detection is enabled.
When low, the offset nulling filters are active and will remove DC offsets on PCM input signals.
for qualification of 2100Hz tones.
When low, the echo canceller algorithm will remain operational regardless of the state of the 2100Hz tone detectors.
When low, the non-linear processors function normally. Useful for G.165 conformance testing.
phase reversals.
When low, the tone detectors will trigger only upon the presence of a 2100Hz tone with periodic phase reversals.
Logic high indicates the presence of a narrow-band signal on Rin.
Tone detection status bit gated with the AutoTD bit.
Logic high indicates that the power level on Rin is above the threshold level (i.e., low power condition).
Decision indicator for the non-linear processor gain adjustment.
Decision indicator for rapid adaptation convergence. Logic high indicates a rapid convergence state.
Logic high indicates the presence of a double-talk condition.
Logic high indicates the presence of a 2100Hz tone.
When high, Echo Cancellers A and B are internally cascaded into one 128ms echo canceller.
When high, echo canceller adaptation is disabled.
When high, Sin data is by-passed to Sout and Rin data is by-passed to Rout.
When high, 12dB of attenuation is inserted into the Rin to Rout path.
When high the Back to Back configuration is enabled.
When high, the noise injection process is disabled. When low noise injection is enabled.
When high, the power-up initialization is executed presetting all register bits including this bit.
Logic high indicates that AutoTD has been enabled and the tone detector has detected the presence of a 2100Hz tone.
When low, Echo Cancellers A and B operate independently.
Do not enable both Extended-Delay and BBM configurations at the same time.
When low, the echo canceller dynamically adapts to the echo path characteristics.
When low, output data on both Sout and Rout is a function of the echo canceller algorithm.
When low the Rin to Rout path gain is 0dB.
When low the Normal configuration is enabled. Do not enable Extended-Delay and BBM configurations at the same time.
Always set both BBM bits of the two echo cancellers to the same logic value to avoid conflict.
Reset
Reset
TDis
7
7
7
7
PHDis
INJDis
INJDis
TD
6
6
6
6
NLPDis
DTDet
BBM
BBM
5
5
5
5
AutoTD
Conv
PAD
PAD
4
4
4
4
Bypass
Bypass
NBDis
Down
3
3
3
3
AdaptDis
AdaptDis
HPFDis MuteS
Active
2
2
2
2
TDG
1
1
1
1
1
0
Extended
Delay
MuteR
ADDRESS = 00h WRITE/READ VERIFY
ADDRESS = 01h WRITE/READ VERIFY
ADDRESS = 20h WRITE/READ VERIFY
ADDRESS = 21h WRITE/READ VERIFY
NB
0
0
0
0
0
ADDRESS = 02h READ
ADDRESS = 22h READ
Power Reset Value
Power Reset Value
Power Reset Value
Power Reset Value
0000 0000
0000 0010
0000 0000
0000 0000
MT9122
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