MT9125AE Zarlink Semiconductor, MT9125AE Datasheet - Page 10

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MT9125AE

Manufacturer Part Number
MT9125AE
Description
MT9125 - Dual Adpcm Transcoder
Manufacturer
Zarlink Semiconductor
Datasheet
MT9125
configuration the ENB1 and ENB2 inputs are
ignored. If F0i is tied continuously to V
operation will be assumed and the transcoder will
use the strobes connected to ENB1 and ENB2 as its
internal reference.
Power-Down Operation (PWRDN)
To minimize power consumption a pin selected,
power-down option is provided. Device power down
is accomplished by forcing the PWRDN pin to V
This asynchronous control forces all internal clocking
to halt and the C2o, EN1, EN2, DSTo and ADPCMo
outputs
PWRDN to V
signal, all outputs will return to their active state and
the internal clocks are re-started. In this mode the
ADPCM algorithm is not reset to the 'optional reset
values', however, the self-convergent nature of the
algorithm will ensure that convergence of the
(AD)PCM streams will occur within 3496 frames as
specified by CCITT G.721.
8-82
R
T
to
DD
become
L
L
L
L
coincident with the next alignment
Generator
in
in
out
out
to SLICs
+
-
Array
+
-
Ring
Gate
MCLK
BCLK
tri-stated.
EN1
EN2
RX
TX
Hookswitch
from SLICs
Figure 9 - Pair Gain Application (SSI/SSI)
Upon
SS
, then SSI
returning
BCLK
F0i
MCLK
ADPCMi
ADPCMo
ENA
BCLK
F0i
MCLK
ADPCMi
ADPCMo
ENA
MT9125
MT9125
SS
.
ENB1
ENB2
DSTo
ENB1
ENB2
DSTo
DSTi
DSTi
ENS
ENS
Removal of the BCLK and MCLK inputs is not
necessary during power-down mode. If the device is
released from power-down without a valid MCLK the
ADPCMo and PCMo outputs will become active,
driving either continuous logic high or logic low, until
a MCLK signal is applied to resume internal
operation.
PWRDN is a schmidt trigger input.
Applications
Various configurations of Pair Gain drops are
depicted in Figures 7, 8 and 9. These show
applications using mixed ST-BUS/SSI, all ST-BUS
and all SSI implementations. Figure10 shows an ST-
BUS line card application for Pair Gain while Figure
11 shows a 2-channel, wireless-set, base station
application based upon ST-BUS.
V
V
DD
DD
Preliminary Information
D
D
FS
FS
BCLK
MCLK
D
D
FS
FS
BCLK
MCLK
D
D
FS
FS
BCLK
MCLK
D
D
FS
FS
BCLK
MCLK
X
R
X
R
X
R
X
R
X
R
X
R
X
R
X
R
X
X
X
X
X
X
X
X
V
V
V
V
V
V
V
V
V
V
V
V
FxL+
FxL+
FxL+
FxL-
FxL-
FRO
FxL-
FRO
FxL+
FRO
FxL-
FRO
C
S
L
S
L
C
I
S
L
C
S
L
C
I
I
I
R
R
T
R
T
T
R
T

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