MPC9443 Motorola, MPC9443 Datasheet - Page 3

• Manufacturer Part Number: MPC9443
• Description: 2.5V AND 3.3V LVCMOS CLOCK FANOUT BUFFER
• Manufacturer: Motorola

a.
b.
c.
d.
e.
TIMING SOLUTIONS
Table 1: Pin Configuration
Table 2: Supported Single and Dual Supply Configurations
Table 3: Function Table (Controls)
CCLK
PCLK0, PCLK0
PCLK1, PCLK1
FSEL A , FSEL B , FSEL C , FSEL D
CCLK_SEL
PCLK_SEL
OE 0 , OE 1
CLK_STOP
GND
V CCA , V CCB , V CCC , V CCD
V CC
QA0 to QA4
QB0 to QB2
QC0 to QC2
QD0 to QD4
3.3V supply
Mixed mode supply
2.5V supply
CCLK_SEL
PCLK_SEL
FSEL A
FSEL B
FSEL C
FSEL D
CLK_STOP
OE 0 , OE 1
Control
V CC is the positive power supply of the device core and input circuitry. V CC voltage defines the input threshold and levels
V CCA is the positive power supply of the bank A outputs. V CCA voltage defines bank A output levels
V CCB is the positive power supply of the bank B outputs. V CCB voltage defines bank B output levels
V CCC is the positive power supply of the bank C outputs. V CCC voltage defines bank C output levels
V CCD is the positive power supply of the bank D outputs. V CCD voltage defines bank D output levels
Supply voltage
configuration
Pin
Default
00
0
0
0
0
0
0
0
PCLK or PCLK1 active (LVPECL clock mode)
PCLK0 active, PCLK1 inactive
f QA0:4 = f REF
f QB0:2 = f REF
f QC0:2 = f REF
f QD0:4 = f REF
Normal operation
V CC a
3.3V
3.3V
2.5V
Input
Input
Input
Input
Input
Input
Input
Input
Output
Output
Output
Output
Freescale Semiconductor, Inc.
For More Information On This Product,
I/O
3.3V or 2.5V
V CCA b
Go to: www.freescale.com
3.3V
2.5V
0
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
Supply
Supply
Supply
LVCMOS
LVCMOS
LVCMOS
LVCMOS
Asynchronous output enable control. See Table 4. OE N
Type
3
3.3V or 2.5V
V CCB c
3.3V
2.5V
LVCMOS clock inputs
LVPECL differential clock input
LVPECL differential clock input
Output bank divide select input
LVCMOS/LVPECL clock input select
PCLK0/PCLK1 clock input select
Output tristate control
Synchronous output enable/disable (clock stop) control
Negative voltage supply
Positive voltage supply output bank (VCC)
Positive voltage supply core (VCC)
Bank A outputs
Bank B outputs
Bank C outputs
Bank D outputs
CCLK active (LVCMOS clock mode)
PCLK1 active, PCLK0 inactive
f QA0:4 = f REF
f QB0:2 = f REF
f QC0:2 = f REF
f QD0:4 = f REF
Outputs are synchronously disabled (stopped) in logic
low state
3.3V or 2.5V
V CCC d
3.3V
2.5V
2
2
2
2
Function
3.3V or 2.5V
V CCD e
3.3V
2.5V
1
MPC9443
MOTOROLA
GND
0 V
0 V
0 V