ADCLK846 Analog Devices, ADCLK846 Datasheet - Page 9

• Manufacturer Part Number: ADCLK846
• Description: 6 LVDS/12 CMOS Outputs Low Power Clock Fanout Buffer
• Manufacturer: Analog Devices

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150
125
100
500
450
400
350
300
250
200
150
100
900
800
700
600
500
400
Figure 9. LVDS Differential Output Swing vs. Input Frequency
Figure 10. LVDS Current vs. Frequency, All Banks Set to LVDS
75
50
25
50
0
0
Figure 11. Additive Broadband Jitter vs. Input Slew Rate
0
0
200
0.5
400
INPUT FREQUENCY (MHz)
INPUT SLEW RATE (V/ns)
600
FREQUENCY (MHz)
1.0
800
1000
1.5
1200
1400
2.0
1600
1800
2
.5
Rev. A | Page 9 of 16
–100
–110
–120
–130
–140
–150
–160
–170
–180
Figure 13. LVDS/CMOS Current vs. Frequency with Various Logic
–80
–90
200
150
100
Figure 14. CMOS Output Duty Cycle vs. Frequency, 10 pF Load
50
55
54
53
52
51
50
49
48
47
46
45
0
10
25
0
Figure 12. Absolute Phase Noise LVDS at 1000 MHz
50
100
ABSOLUTE PHASE NOISE MEASURED @ 1GHz WITH AGILENT
E5052 USING WENZEL CLOCK SOURCE CONSISTING OF A
WENZEL 100MHz CRYSTAL OSCILLATOR (P/N 500-06672),
WENZEL 5× MULTIPLIER (P/N LNOM-100-5-13-14-F-A), AND A
WENZEL 2× MULTIPLIER (P/N LNDD-500-14-14-1-D).
CLOCK SOURCE
50
75
1k
FREQUENCY OFFSET (Hz)
100
Combinations
FREQUENCY (MHz)
FREQUENCY (MHz)
BANK A LVDS,
BANK B CMOS
100
10k
125
ADCLK846
BANK A CMOS,
BANK B LVDS
100k
150
150
BOTH BANKS CMOS
175
BOTH BANKS LVDS
1M
200
200
ADCLK846
10M
225
100M
250
250