PIC12C671 Microchip Technology, PIC12C671 Datasheet

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PIC12C671

Manufacturer Part Number
PIC12C671
Description
EPROM Memory Programming Specification
Manufacturer
Microchip Technology
Datasheet

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This document includes the programming
specifications for the following devices:
• PIC12C671
• PIC12C672
• PIC12CE673
• PIC12CE674
1.0
The PIC12C67X and PIC12CE67X can be pro-
grammed using a serial method. In serial mode the
PIC12C67X and PIC12CE67X can be programmed
while in the users system. This allows for increased
design flexibility.
1.1
The PIC12C67X and PIC12CE67X requires two pro-
grammable power supplies, one for V
recommended) and one for V
supplies should have a minimum resolution of 0.25V.
1.2
The programming mode for the PIC12C67X and
PIC12CE67X allows programming of user program
memory, special locations used for ID, and the configu-
ration word for the PIC12C67X and PIC12CE67X.
PIN DESCRIPTIONS (DURING PROGRAMMING): PIC12C671/672 and PIC12CE673/674
1998 Microchip Technology Inc.
Legend: I = Input, O = Output, P = Power
GP3/MCLR/V
PROGRAMMING THE
PIC12C67X AND PIC12CE67X
Hardware Requirements
Programming Mode
Pin Name
GP1
GP0
V
V
DD
SS
EPROM Memory Programming Specification
PP
PP
PIC12C67X AND PIC12CE67X
(12V to 14V). Both
Pin Name
CLOCK
DATA
V
V
V
DD
PP
DD
SS
(2.0V to 6.0V
Pin Type
I/O
P
P
P
I
During Programming
Pin Diagram:
GP5/OSC1/CLKIN
GP4/OSC2/AN3/
GP3/MCLR/V
PDIP
CLKOUT
Clock input
Data input/output
Programming Power
Power Supply
Ground
V
DD
PP
1
2
3
4
Pin Description
8
7
6
5
DS40175A-page 1
V
GP0/AN0
GP1/AN1/V
GP2/T0CKI/
AN2/INT
SS
REF

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PIC12C671 Summary of contents

Page 1

... The programming mode for the PIC12C67X and PIC12CE67X allows programming of user program memory, special locations used for ID, and the configu- ration word for the PIC12C67X and PIC12CE67X. PIN DESCRIPTIONS (DURING PROGRAMMING): PIC12C671/672 and PIC12CE673/674 Pin Name Pin Name GP1 CLOCK ...

Page 2

... Table 2-1 shows actual implementation of program memory in the PIC12C67X family. TABLE 2-1: IMPLEMENTATION OF PROGRAM MEMORY IN THE PIC12C67X Device Program Memory Size PIC12C671/ 0x000 - 0x3FF (1K) PIC12CE673 PIC12C672/ 0x000 - 0x7FF (2K) PIC12CE674 When the PC reaches the last location of the imple- mented program memory, it will wrap around and address a location within the physically implemented memory (see Figure 2-1) ...

Page 3

... PROGRAM MEMORY MAPPING 2000 ID Location 2001 ID Location 2002 ID Location 2003 ID Location 2004 Reserved 2005 Reserved 2006 Reserved 2007 Configuration Word 1998 Microchip Technology Inc. 0 1KW 1FF Implemented 3FF 400 7FF 800 BFF C00 FFF 1000 Reserved 1FFF 2000 2008 Reserved ...

Page 4

... A description of the memory mapping schemes for normal operation and configuration mode ). IL Mapping (MSB ... LSB Data 0, data(14 data(14 data(14 1998 Microchip Technology Inc. ...

Page 5

... V V DDP DD = Minimum for device operation MIN = Maximum for device operation MAX 1998 Microchip Technology Inc. Start Set IHH1 • Set DDP > 25 Program Cycle Read Data Command Program Cycles No Data Correct? ...

Page 6

... Data Correct? Read Data Command Set Read Data Command No Data Correct? Yes Apply 3N Program Cycles Read Data Command No Data Correct? Yes Set min V min Read Data Command Set IHH2 Yes max max DD DD IHH2 1998 Microchip Technology Inc. ...

Page 7

... END PROGRAMMING After receiving this command, the chip stops program- ming the memory (configuration program memory or user program memory) that it was programming at the time. 1998 Microchip Technology Inc. 1.1 Programming Algorithm Requires Variable V DD The PIC12C67X and PIC12CE67X uses an intelligent algorithm. The algorithm calls for program verification ...

Page 8

... All of the CP1:CP0 pairs have to be given the same value to enable the code protection scheme listed. 4: 07FFh is always uncodeprotected on the 12C672 and 03FFh is always uncodeprotected on the 12C671. This location contains the RETLW xx calibration instruction for the INTRC. DS40175A-page CP0 PWRTE WDTE FOSC2 FOSC1 0 Register: CONFIG FOSC0 Address 2007h 1998 Microchip Technology Inc. ...

Page 9

... Similarly, while saving a hex file, configuration word and ID information must be included. An option to not include this information may be provided. Microchip Technology Inc. feels strongly that this feature is important for the benefit of the end customer. TABLE 3-1: CONFIGURATION WORD PIC12C671, PIC12CE673 To code protect: • Protect all memory 00 0000 X00X XXXX • Protect 0200h-07FFh 01 0101 X01X XXXX • ...

Page 10

... PIC12C671/CE673. Any carry bits exceeding 16-bits are neglected. Finally, the configuration word (appropri- ately masked) is added to the checksum. Checksum computation for each member of the PIC12C67X and PIC12CE67X devices is shown in Table 3-2 ...

Page 11

... P8 Thld0 Hold time after Hold time after V PPDP Note 1: Program must be verified at the minimum and maximum V Note 2: V must be greater than V IHH DD 1998 Microchip Technology Inc. 5.5V, unless otherwise stated. Min. Typ. 4.75 5 min DD during 12.75 ...

Page 12

... 100n min. Reset FIGURE 4-3: INCREMENT ADDRESS COMMAND (PROGRAM/VERIFY IHH MCLR GP1 (CLOCK) GP0 0 (DATA) Reset 1998 Microchip Technology Inc min min 100n min. Program/Verify Mode min ...

Page 13

... EPROM Memory Programming Specification NOTES: 1998 Microchip Technology Inc. DS40175A-page 13 ...

Page 14

... Information contained in this publication regarding device applications and the like is intended for suggestion only and may be superseded by updates. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip’ ...

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