PIC12F519 Microchip Technology, PIC12F519 Datasheet - Page 15

• Manufacturer Part Number: PIC12F519
• Description: 8-Bit Flash Microcontroller
• Manufacturer: Microchip Technology

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4.0
The PIC12F519 memories are organized into program
memory and data memory (SRAM).The self-writable
portion of the program memory called Flash data mem-
ory is located at addresses at 400h-43Fh. All program
mode commands that work on the normal Flash mem-
ory work on the Flash data memory. This includes bulk
erase, row/column/cycling toggles, Load and Read
data commands (Refer to Chapter 6 for more details).
For devices with more than 512 bytes of program mem-
ory, a paging scheme is used. Program memory pages
are accessed using one STATUS register bit. For the
PIC12F519, with data memory register files of more
than 32 registers, a banking scheme is used. Data
memory banks are accessed using the File Select
Register (FSR).
4.1
The PIC12F519 device has an 11-bit Program Counter
(PC) capable of addressing a 2K x 12 program memory
space. Program memory is partitioned into user memory,
data memory and configuration memory spaces.
The user memory space is the on-chip user program
memory. As shown in Figure 4-1, It extends from 0x000
to 0x3FF and partitions into pages, including Reset
vector at address 0x3FF. Note that the PC will
increment from (0x000-0x3FF) then to 0x400, (not to
0x000).
The data memory space is the Flash data memory
block and is located at addresses PC = 400h-43Fh. All
program mode commands that work on the normal
Flash memory work on the Flash data memory block.
This includes bulk erase, Load and Read data
commands.
The configuration memory space extends from 0x440
to 0x7FF. Locations from 0x448 through 0x49F are
reserved. The User ID locations extend from 0x440
through 0x443. The backup OSCCAL locations extend
from 0x444 through 0x447. The Configuration Word is
physically located at 0x7FF.
Refer
Specification”, DS41316, for more detail.
© 2007 Microchip Technology Inc.
to
MEMORY ORGANIZATION
Program Memory Organization for
the PIC12F519
“PIC12F519
Memory
Programming
Preliminary
FIGURE 4-1:
Flash Data Memory
User ID Locations
Configuration Word
Memory (Page 0)
Memory (Page 1)
Backup OSCCAL
Unimplemented
On-chip User
On-chip User
MEMORY MAP
Reserved
Reset Vector
Locations
Program
Program
PIC12F519
DS41319A-page 13
443h
447h
448h
000h
1FFh
200h
3FEh
3FFh
400h
43Fh
440h
444h
49Fh
4A0h
7FEh
7FFh