PIC12F639 Microchip Technology, PIC12F639 Datasheet - Page 139
PIC12F639
Manufacturer Part Number
PIC12F639
Description
(PIC12F635 / PIC12F636 / PIC12F639) 8/14-PIN FLASH-BASED / 8-BIT CMOS MICROCONTROLLERS WITH NANOWATT TECHNOLOGY
Manufacturer
Microchip Technology
Datasheet
1.PIC12F639.pdf
(196 pages)
- Current page: 139 of 196
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RETFIE
Syntax:
Operands:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
Example:
RETLW
Syntax:
Operands:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
Example:
TABLE
© 2005 Microchip Technology Inc.
Return with Literal in W
[ label ]
0
k
TOS
The W register is loaded with the
eight-bit literal ‘k’. The program
counter is loaded from the top of the
stack (the return address). This is a
two-cycle instruction.
1
2
CALL TABLE ;W contains table
•
•
•
ADDWF PC
RETLW k1
RETLW k2
•
•
•
RETLW kn
Before Instruction
After Instruction
Return from Interrupt
[ label ]
None
TOS
1
Return from interrupt. Stack is POPed
and Top-of-Stack (TOS) is loaded in
the PC. Interrupts are enabled by
setting the Global Interrupt Enable bit,
GIE (INTCON<7>). This is a
two-cycle instruction.
1
2
After Interrupt
RETFIE
k
11
00
(W);
GIE
255
PC
PC,
W
W
RETLW k
PC =
GIE =
RETFIE
;offset value
;W now has table value
;W = offset
;Begin table
;
; End of table
01xx
0000
=
=
0x07
value of k8
TOS
1
kkkk
0000
1001
kkkk
PIC12F635/PIC16F636/639
Preliminary
RETURN
Syntax:
Operands:
Operation:
Status Affected:
Description:
RLF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Return from Subroutine
[ label ]
None
TOS
None
Return from subroutine. The stack
is POPed and the top of the stack
(TOS) is loaded into the program
counter. This is a two-cycle
instruction.
Rotate Left f through Carry
[ label ]
0
d
See description below
C
The contents of register ‘f’ are
rotated one bit to the left through
the CARRY flag. If ‘d’ is ‘0’, the
result is placed in the W register.
If ‘d’ is ‘1’, the result is stored
back in register ‘f’.
1
1
Before Instruction
After Instruction
00
RLF
f
[0,1]
PC
127
C
RETURN
REG1
C
REG1
W
C
RLF
1101
REG1,0
DS41232B-page 137
Register f
f,d
=
=
=
=
=
dfff
1110 0110
0
1110 0110
1100 1100
1
ffff
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