TSS461 ATMEL Corporation, TSS461 Datasheet - Page 37

• Manufacturer Part Number: TSS461
• Description: VAN Data Link Controller
• Manufacturer: ATMEL Corporation

Message Length And
Status Register
M_L [4:0]: Message
Length
CHER: Channel Error
Status and Abort
Command
CHTx: Channel
Transmitted and
Transmit Enable
Command
4194C–AUTO–01/06
The message length and status register at address (base_address + 0x03) is also 8 bits wide. It
indicates the length reserved for the message in the Message DATA RAM area.
•
The 5 high bits of this register allow the user to specify either the length of the message to be
transmitted, or the maximum length of a message receivable in the pointed reception buffer.
Note, that the first byte in this register does not contain data, but the length of the message
received. This implies that the length value has to be equal to or greater than the maximum
length of a message to be received in this buffer (or the length of a message to be transmitted)
plus 1. Thus allowing a maximum length of 30 bytes and a minimum length of 0 byte.
If the value of this field is "illegal" (i.e 0x00) then this message pointer is defined as being a link
(see section “Message Pointer Register” and section “Linked Channels”).
As status, this bit is set by the TSS461E when error occurs in transmission or on a received
frame. The user must reset it.
To abort the transmission defined in the channel, this bit can be set to1 by the user (see
section “Retries, Rearbitrate and Abort” and section “Abort”).
Read/Write register.
M_L 4
7
M_L [4:0] = 0x1D
M_L [4:0] = 0x1E
M_L [4:0] = 0x00
M_L [4:0] = 0x01
M_L [4:0] = 0x02
M_L [4:0] = 0x1F
M_L 3
6
- - - - - - -
(*) Different of a reply request frame with no in-frame reply (deferred reply).
M_L 2
5
M_L 1
4
M_L 0
3
CHER
2
- - - - - - - - - - - - - - - - - - - - - -
Frame with no DATA field (*)
Frame with 28 DATA bytes
Frame with 29 DATA bytes
Frame with 30 DATA bytes
Frame with 1 DATA byte
Linked channel
CHTx
1
CHRx
0
TSS461E
base_address
+ 0x03
37