BSP3505D Micronas Intermetall GmbH, BSP3505D Datasheet - Page 8

• Manufacturer Part Number: BSP3505D
• Manufacturer: Micronas Intermetall GmbH

8
BSP 3505D
Table 3–3: Control Register (Subaddress: 00
3.1. Protocol Description
Write to DSP
Read from DSP
Write to Control or Test Registers
Note: S =
I
I
Fig. 3–1: I
(Data: MSB first)
2
2
S
C_DA
C_CL
S
S
Name
CONTROL
address
device
write
P =
ACK =
NAK =
Wait =
address
device
write
2
C bus protocol
address
device
Wait
write
S
I
I
Acknowledge-Bit: LOW on I
or master (= CCU, hatched)
Not Acknowledge-Bit: HIGH on I
or from BSP indicating internal error state
I
2
2
2
C-Bus Start Condition from master
C-Bus Stop Condition from master
C-Clock line held low by the slave (= BSP) while interrupt is serviced (<1.8 ms)
Wait
ACK
Subaddress
00
ACK
sub-addr
hex
Wait
sub-addr
ACK
ACK
(MSB first; data must be stable while clock is high)
addr-byte
high
ACK
MSB
1 : RESET
0 : normal
sub-addr
2
C_DA from slave (= BSP, gray)
hex
ACK
1
addr-byte
0
high
2
)
C_DA from master (= CCU, hatched) to indicate ‘End of Read’
addr-byte
low
ACK
ACK
ACK
14
0
addr-byte low
S
data-byte high
address
device
read
ACK
Wait
P
data-byte high
13..1
0
ACK
ACK
PRELIMINARY DATA SHEET
data-byte
high
ACK
data-byte low
Ç Ç Ç
Ç Ç Ç
Ç Ç Ç
ACK
data-byte low
LSB
0
data-byte
low
Ç Ç Ç
Ç Ç Ç
Ç Ç Ç
ACK
Micronas
ACK
NAK
P
P
P