SDA9251-2X Infineon Technologies Corporation, SDA9251-2X Datasheet
SDA9251-2X
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SDA9251-2X Summary of contents
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Dynamic Sequential Access Memory for Television Applications (TV-SAM) Preliminary Data Features 212 4-bit organization Triple port architecture One 16 x 4-bit input shift register Two 16 x 4-bit output shift registers Shift registers independently ...
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Functional Description The SDA 9251 is a triple port 868 352 bit dynamic sequential-access memory for high-data-rate video applications organized as 212 rows by 64 columns by 16 arrays by 4 bit to allow for the storage of ...
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Data Input (SDC, SCB) Data are shifted in through the serial port C (SDC0, …, SDC3) at the rising edge of the shift clock SCB. After16 clock pulses the data have to be transferred from shift register C to latch ...
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Data Transfer from Latch B to Shift Register B (RB) The contents of latch B are transferred to shift register B at the falling edge of the read transfer signal RB. If the timing restrictions between RB and the shift ...
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Typical Memory Cycle Sequence A typical application of the TV-SAM is a real-time interfield image processing combined with flicker reduction. This can be achieved, for example, by writing and reading with 13.5-MHz clock rate via port C and B and ...
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Typical Memory Cycle Sequence Semiconductor Group 164 SDA 9251-2X ...
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Pin Configuration (top view) Semiconductor Group 165 SDA 9251-2X ...
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Pin Definitions and Functions Pin No. Symbol Input (I) Output (O) 3 SQA0 O 2 SQA1 O 27 SQA2 O 26 SQA3 O 20 SCA OEA I 5 SQB0 O 4 SQB1 O 24 SQB2 ...
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Block Diagram Semiconductor Group 167 SDA 9251-2X ...
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Absolute Maximum Ratings Parameter Storage temperature Soldering temperature Soldering time Input/output voltage Test function input voltage Power supply voltage Data out current (short circuit) Total power dissipation Power dissipation per output Operating Range Parameter Supply voltage Supply voltage Supply voltage ...
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DC Characteristics Parameter Symbol Test enable input V (TF) IH high voltage V Test disable input (TF) IL low voltage H-output voltage V QH L-output voltage ...
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AC Characteristics Parameter Symbol Memory read write cycle time t RE low time RE t Serial port cycle SC time t RE precharge ...
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AC Characteristics (cont’ Parameter Symbol lead time t WRL lead time WRL t Output buffer turn- OFF off delay ...
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AC Characteristics (cont’ Parameter Symbol Refresh period t REF t Transition time T (rise/fall) L-serial clock time t SCL t H-serial clock time SCH Hold time ...
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Operation Truth Table N RE Cycle SCAD SAR SAC Mode M0 RA0…RA7 CA0…CA5 L RA0…RA7 CA0…CA5 H RA0…RA7 CA0…CA5 Note Dont’t care ...
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Diagram 1 AC-Timing Measuring Conditions Semiconductor Group 174 SDA 9251-2X ...
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Diagram 2 Read Transfer Memory to Port A Semiconductor Group 175 SDA 9251-2X ...
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Diagram 3 Read Transfer Memory to Port B Semiconductor Group 176 SDA 9251-2X ...
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Diagram 4 Write Transfer from Port C to Memory Semiconductor Group 177 SDA 9251-2X ...
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Diagram 5 Semiconductor Group 178 SDA 9251-2X ...
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Diagram 6 Refresh with Internal Row Address Semiconductor Group 179 SDA 9251-2X ...
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Application Circuit For best performance and operation within the specified AC parameter limits it is mandatory to use separate decoupling capacitors for V shorted to on the board as shown in figure below. CC2 C Decoupling capacitors and 1 To ...
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Typical Application Digital Storage Field As standard for digital TV systems, CCIR recommendation 601 defines a field of 288 lines with 720 pixels per line. The sampling frequency is 13.5 MHz with a resolution of 8 bit ...