SDA9257 Infineon Technologies Corporation, SDA9257 Datasheet - Page 6

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SDA9257

Manufacturer Part Number
SDA9257
Description
Clock SYNC Generator
Manufacturer
Infineon Technologies Corporation
Datasheet

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ADC with Built in Antialiasing filter and
Clock generation UnitS
ABACUS
Preliminary Data
1
1.1
• Three equivalent CMOS A/D converters on chip
• 30 MHz sampling rate
• 8-Bit resolution
• No external sample & hold required
• Internal clamping circuits for each of the ADCs
• Internal amplification of input signals
• Internal pre-filtering of analog input signals
• High performance decimation filters
• Two data sampling modes (4:2:2 and 4:1:1)
• 3 output data interfaces
• Overflow and underflow
• On-chip sync and clock generation
• Separate SYNC input with clamping for sync and clock generation
• positive and negative polarity of SYNC signal (switchable by
• Lock-in behavior can be set via
• Frequency generator function possible with digitally adjustable frequency
• Clock generation for single and double line input frequencies supported
• Vertical noise suppression and 50/60 Hz detection (for 1fh mode only)
Type
SDA 9206
Semiconductor Group
can be set by
(max. line frequency of SYNC input: 38 kHz)
(1fh / 2fh mode)
- CCIR 656 interface (8 wires)
- Parallel data interface (2 x 8 wires)
- Quasi Parallel data interface (8 + 4 wires)
Overview
Features
I
2
C Bus
I
2
C status bits
Ordering Code
Q67101-H5185-A704
I
2
C Bus
6
Package
P-MQFP-64-3
P-MQFP-64-3
I
2
C Bus)
SDA 9206
1999-02-10
CMOS

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