PIC16C771-20I/SS Microchip Technology, PIC16C771-20I/SS Datasheet - Page 76

• Manufacturer Part Number: PIC16C771-20I/SS
• Description: 18/20-Pin/ 8-Bit CMOS Microcontrollers with 10/12-Bit A/D
• Manufacturer: Microchip Technology

PIC16C717/770/771
9.1.7
In master mode, all module clocks are halted and the
transmission/reception will remain in that state until the
device wakes from sleep. After the device returns to
normal mode, the module will continue to transmit/
receive data.
In slave mode, the SPI transmit/receive shift register
operates asynchronously to the device. This allows the
device to be placed in sleep mode and data to be
shifted into the SPI transmit/receive shift register.
When all 8 bits have been received, the MSSP interrupt
flag bit will be set and if enabled will wake the device
from sleep.
TABLE 9-1:
DS41120A-page 76
Legend: x = unknown, u = unchanged, - = unimplemented read as ’0’. Shaded cells are not used by the MSSP in SPI mode.
10Bh,18Bh
0Bh, 8Bh,
Address
0Ch
8Ch
13h
14h
94h
SLEEP OPERATION
SSPCON
SSPSTAT
SSPBUF
INTCON
Name
PIR1
PIE1
REGISTERS ASSOCIATED WITH SPI OPERATION
WCOL
Bit 7
SMP
GIE
—
—
SSPOV
ADIE
Bit 6
PEIE
ADIF
CKE
Synchronous Serial Port Receive Buffer/Transmit Register
Advanced Information
SSPEN
Bit 5
T0IE
D/A
—
—
INTE
Bit 4
CKP
—
—
P
SSPM3
SSPIE
SSPIF
RBIE
Bit 3
S
9.1.8
A reset disables the MSSP module and terminates the
current transfer.
CCP1IF
CCP1IE
SSPM2
Bit 2
T0IF
R/W
EFFECTS OF A RESET
TMR2IE
TMR2IF
SSPM1
INTF
Bit 1
UA
TMR1IF
TMR1IE
SSPM0
RBIF
Bit 0
BF
1999 Microchip Technology Inc.
0000 000x
-0-- 0000
-0-- 0000
xxxx xxxx
0000 0000
0000 0000
POR, BOR
MCLR, WDT
0000 000u
-0-- 0000
-0-- 0000
uuuu uuuu
0000 0000
0000 0000