AN178 Philips, AN178 Datasheet - Page 11

• Manufacturer Part Number: AN178
• Description: Modeling the PLL
• Manufacturer: Philips

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Philips Semiconductors
Thus, for a given DC phase comparator output V
amplitude decrease must be accompanied by a phase change.
Since the loop can remain locked only for
the lower V
Note from the second term that during lock the lowest possible
frequency is
present at the phase comparator output. This component is usually
greatly attenuated by the low-pass filter capacitor connected to the
phase comparator output. However, when rapid tracking is required
(as with high-speed FM detection or FSK), the requirement for a
relatively high frequency cutoff in the low-pass filter may leave this
component unattenuated to the extent that it interferes with
detection. At the very least, additional filtering may be required to
remove this component. Components caused by n
second term are both attenuated and of much higher frequency, so
they may be neglected.
Suppose that other frequencies represented by V
What is their effect for V
The third term shows that V
frequency component. Obviously, if
with the locking process since it may form a beat frequency of the
same magnitude as the desired locking beat frequency. However,
suppose lock has been achieved so that
to be maintained, the average phase comparator output must be
constant. If
change to compensate for this beat frequency. Broadly speaking,
any signal in addition to the signal to which the loop is locked
causes a phase variation. Usually this is negligible since
far removed from
can move only between 0 and 180 . Suppose the phase limit has
been reached and V
it will drive the loop out of lock. This explains why extraneous
signals can result in a decrease in the lock range. If V
to be an instantaneous noise component, the same effect occurs.
When the full swing of the loop is being utilized, noise will decrease
the lock or tracking range. This effect can be reduced by decreasing
the cutoff frequency of the lowpass filter so that the
attenuated to a greater extent, which illustrates that noise immunity
and out-band frequency rejection is improved (at the expense of
capture range since
low-pass filter capacitor is large.
The third term can have a DC component when
harmonic of the locked frequency so that (2n + 1) (
and
will change the
when the waveform of the incoming signal is, for example, a square
wave. The
a linear function of input frequency. Other waveforms will give
different phase versus frequency functions. When the input
amplitude V
close to 90 throughout the range of VCO swing, so this effect is
often unnoticed.
The fourth term is of little consequence except that if
zero, the phase comparator output will have a component at the
locked frequency
input differential stage will appear as a square wave of fundamental
attenuated by the low-pass filter. Since many out-band signals or
noise components may be present, many V
combining to influence locking and phase during lock. Fortunately,
only those close to the locked frequency need be considered.
1988 Dec
4
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Modeling the PLL
at the phase comparator output. This is usually small and well
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k
makes its appearance. This will have an effect on
l
l
becomes, the more the lock range is reduced.
k
is large and the loop gain is large, the phase will be
O
O
term will combine with the
=
+
1
versus frequency
O
k
I
I
. However, it has been stated that the phase
k
is relatively low in frequency, the phase
= 2
at the output. For example, a DC offset at the
appears. Since it cannot be compensated for,
O
–
k
I
. A sum frequency component is always
0?
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k
is likewise attenuated when the
introduces another difference
I
k
. This is most noticeable
is close to
1
O
i
k
term so that the phase is
between 0 and 180 ,
=
terms may be
I
. In order for lock
E
k
k
, an input
are present.
is an odd
I
O
, it can interfere
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0 in the
k
–
k
–
is assumed
approaches
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) is zero
k
1
k
is
is often
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11
Quadrature-Phase Detector (QPD)
The quadrature-phase detector action is exactly the same except
that its output is proportional to the sine of the phase angle. When
the phase
its maximum, which explains why it makes a useful lock or
amplitude detector. The output of the quadrature-phase detector is
given by
where V
most cases so that sine
This is the demodulation principle of the autodyne receiver and the
basis for the 567 tone decoder operation.
INITIAL PLL SETUP CHOICES
In a given application, maximum PLL effectiveness can be achieved
if the designer understands the tradeoffs which can be made.
Generally speaking, the designer is free to select the frequency, lock
range, capture range, and input amplitude.
FREE-RUNNING FREOUENCY SELECTION
Setting the center or free-running frequency is accomplished by
selecting one or two external components. The center frequency is
usually set in the center of the expected input frequency range.
Since the loop’s ability to capture is a function of the difference
between the incoming and free-running frequencies, the band edges
of the capture range are always an equal distance (in Hz) from the
center frequency. Typically, the lock range is also centered about
the free-running frequency. Occasionally, the center frequency is
chosen to be offset from the incoming frequency so that the tracking
range is limited on one side. This permits rejection of an adjacent
higher or lower frequency signal without paying the penalty for
narrow-band operation (reduced tracking speed).
All of Philips Semiconductors loops use a phase comparator in
which the input signal is multiplied by a unity square wave at the
VCO frequency. The odd harmonics present in the square wave
permit the loop to lock to input signals at these odd harmonics.
Thus, the center frequency may be set to, say, 1/3 or 1/5 of the input
signal. The tracking range, however, will be considerably reduced
as the higher harmonics are utilized.
The foregoing phase comparator discussion would suggest that the
PLL cannot lock to subharmonics because the phase comparator
cannot produce a DC component if
The loop can lock to both odd harmonic and subharmonic signals in
practice because such signals often contain harmonic components
at
substantial component at
pure sine wave input signal can be used for harmonic locking if the
PLL input stage is overdriven. (The resultant internal limiting
generates harmonic frequencies.) Locking to even harmonics or
subharmonics is the least satisfactory, since the input or VCO signal
must contain second harmonic distortion. If locking to even
harmonics is desired, the duty cycle of the input and VCO signals
must be shifted away from the symmetrical to generate substantial,
even harmonic, content.
O
V
V
. For example, a square wave of fundamental
q
q
l
is the constant or modulated AM signal and
i
2A
2A
is 90 , the quadraturephase detector output is then at
q
q
V
V
I
I
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sin
i
i
= 1 and
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to which the loop can lock. Even a
I
is less than
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Application note
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